Microprocessor supervision in a special purpose computer system

• US 7,774,648 B2
• Filed: 05/02/2007
• Issued: 08/10/2010
• Est. Priority Date: 05/02/2007
• Status: Active Grant

• Current Assignee: Honeywell International Inc.
• Original Assignee: Honeywell International Inc.
• Inventors: Anglin, Mark E., Majewski, Joseph S.
• Primary Examiner(s): Le; Dieu-Minh
• Application Number:
  US11/743,566
• Publication Number:
  US 20080276132A1
• Time in Patent Office: 1,196 Days
• Field of Search: 714/23, 714/24, 714/28, 714/36, 714/47, 714/51, 714/55
• US Class Current: 714/23
• CPC Class Codes: G06F 11/0757 by exceeding a time limit, i.e. time-out, e.g. watchdogs
• CPC Class Codes: G06F 11/1417 Boot up procedures

Abstract

Devices and methods for microprocessor supervision in a special purpose computer system are provided. One illustrative embodiment includes a first watchdog timer internal to the microprocessor and a second watchdog timer external to the microprocessor. In some cases, the internal watchdog timer may be initiated prior to or during the operating system startup and the external watchdog timer may be initiated after the operating system is up and running. The internal watchdog timer may have a relatively longer timer duration than the external watchdog timer, but is not required in all embodiments. In some embodiments, the internal watchdog timer may monitor the microprocessor'"'"'s startup sequence and the internal watchdog timer and/or external watchdog timer may monitor the microprocessor when the operating system is up and running. If the microprocessor faults at any time during startup or while the operating system is up and running, the internal and/or external watchdog timer may trigger a microprocessor reset.

Claims

1. A special purpose computer system, comprising:

a microprocessor having an operating system;

an internal watchdog timer internal to the microprocessor, the microprocessor toggling the internal watchdog timer and if the microprocessor does not toggle the internal watchdog timer for a first timer duration, the internal watchdog timer causes the microprocessor to reset;

an external watchdog timer external to the microprocessor, the microprocessor toggling the external watchdog timer and if the microprocessor does not toggle the external watchdog timer for a second timer duration, the external watchdog timer causes the microprocessor to reset; and

wherein the first timer duration is longer than the second timer duration.

2. The special purpose computer system of claim 1 wherein, upon startup, the operating system takes an operating system launch time period to achieve normal operation, and wherein the first timer duration is equal to or greater than the operating system launch time period.

3. The special purpose computer system of claim 2 wherein the internal watchdog timer has an enable and the external watchdog timer has an enable, wherein the internal watchdog timer is enable before the operating system achieves normal operation.

4. The special purpose computer system of claim 3 wherein the internal watchdog timer is enabled by a low level processor initialization routine.

5. The special purpose computer system of claim 4 wherein the low level processor initialization routine is initiated before the operating system is launched.

6. The special purpose computer system of claim 3 wherein the external watchdog timer is enabled after the operating system is launched and achieves normal operation.

7. The special purpose computer system of claim 6 wherein the external watchdog timer is enabled by an application software utility, and wherein the application software utility is launched after the operating system is launched and achieves normal operation.

8. The special purpose computer system of claim 1 wherein the operating system is a commercial off-the-shelf operating system (COTS).

9. The special purpose computer system of claim 1 wherein the first timer duration is programmable.

10. The special purpose computer system of claim 1 wherein the second timer duration is fixed.

11. A special purpose computer system, comprising:

a microprocessor including a commercial off-the-shelf operating system (COTS), a strobe output, and a reset input, wherein the reset input resets the microprocessor;

an internal watchdog timer internal to microprocessor, the microprocessor toggling the internal watchdog timer and if the microprocessor does not toggle the internal watchdog timer for a first timer duration, the internal watchdog timer causes the microprocessor to reset;

an external watchdog timer including a strobe input coupled to the strobe output of the microprocessor, a reset output coupled to the reset input of the microprocessor, and a timer having a second timer duration, wherein the microprocessor toggles the external watchdog timer and if the microprocessor does not toggle the external watchdog timer for a period that is greater than or equal to the second timer duration, the external watchdog timer asserts the reset output causing the microprocessor to reset; and

wherein the first timer duration is different than the second timer duration.

12. The special purpose computer system of claim 11 wherein the internal watchdog timer includes an enable, and wherein the microprocessor is configured to enable the internal watchdog timer prior to or during a period where the commercial off-the-shelf operating system (COTS) is launched.

13. The special purpose computer system of claim 11 wherein the external watchdog timer includes an enable, and wherein the microprocessor is configured to enable the external watchdog timer after the commercial off-the-shelf operating system (COTS) is launched and up and running.

14. The special purpose computer system of claim 11 wherein the microprocessor launches one or more applications after the commercial off-the-shelf operating system (COTS) is launched and up and running, and the external watchdog timer is enabled by one or more of the applications.

15. The special purpose computer system of claim 11 wherein one or more of the applications causes the microprocessor to toggle the external watchdog timer.

16. The special purpose computer system of claim 11 wherein the first timer duration is longer than the second timer duration.

17. A method for supervising a microprocessor of a special purpose computer system, comprising:

launching an operating system of the microprocessor, the operating system taking an operating system launch time to fully launch and achieve normal operation;

enabling a first watchdog timer prior to or during the launching step, the first watchdog timer having a first timer duration that causes the first watchdog timer to expire after the operating system launch time, the microprocessor toggling the first watchdog timer and if the microprocessor does not toggle the first watchdog timer prior to the expiration of the first timer duration, the first watchdog timer causing a microprocessor reset;

enabling a second watchdog timer after the launching step, the second watchdog timer having a second timer duration that is shorter than the first timer duration, the microprocessor toggling the second watchdog timer and if the microprocessor does not toggle the second watchdog timer prior to the expiration of the second timer duration, the second watchdog timer causing a microprocessor reset; and

causing a microprocessor reset if the first watchdog timer or the second watchdog timer expires.

18. The method of claim 17 wherein the first watchdog timer is internal to the microprocessor.

19. The method of claim 18 wherein the second watchdog timer is external to the microprocessor.

20. The method of claim 17 wherein the operating system is a commercial off-the-shelf operating system (COTS).