Modulation scheme for communication environments

• US 7,778,334 B2
• Filed: 05/18/2005
• Issued: 08/17/2010
• Est. Priority Date: 05/18/2005
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Belogolovyi, Andrey V., Chernyshev, Vladislav A., Taubin, Felix A.
• Primary Examiner(s): VO, DON NGUYEN
• Application Number:
  US10/576,171
• Publication Number:
  US 20090010318A1
• Time in Patent Office: 1,917 Days
• Field of Search: 375/260, 375/261, 375/262, 375/264, 375/265, 375/295, 375/298, 375/353, 714/752
• US Class Current: 375/260
• CPC Class Codes: H04B 14/023 using pulse amplitude modulation
• CPC Class Codes: H04L 25/4917 using multilevel codes

Abstract

According to an aspect of the present invention, a symbol corresponding to a combination may be determined from a symbol set comprising at least sixteen PAM symbols. A sample such as a pulse may be generated based on the symbol value and a train of such pulses may be transmitted at a rate of at least 10 giga bits per second over a communication medium comprising, for example, a twisted copper cable. The received signal may be demodulated based on the empirically determined reliability values.

Claims

1. A method comprising:

receiving a bit stream,

generating a coded bit stream of N bits by encoding a first portion of K bits of the bit stream using low density parity check coding technique and an un-coded bit stream of N/3 bits from a second portion of the bit stream,

producing a combination by selecting at least N1 bits from the coded bit stream and N1/3 bits from the un-coded bit stream;

determining a symbol, using a pulse amplitude modulation PAM-16 scheme, corresponding to the combination from a symbol set comprising at least sixteen symbols, wherein information bits in each symbol is based on a code rate determined using size of the first portion and size of the coded bit stream; and

transmitting a signal corresponding to the symbol at a rate of at least 10 giga bits per second over a communication medium.

2. The method of claim 1, wherein the combination comprises four bits, wherein one bit is selected from the un-coded bit stream of N/3 bits and three bits are selected from the coded bit stream of N bits.

3. The method of claim 1, wherein determining the symbol comprises selecting the symbol based on a bit-to-symbol mapping table.

4. The method of claim 3, wherein selecting comprises searching for a matching entry corresponding to the combination and producing the symbol corresponding to the matching entry.

5. The method of claim 1 further comprises:

decoding the coded bit stream to generate an extracted bit stream based on a reliability assignment corresponding to each bit of the coded bit stream, and

generating a bit stream representing data, and sending the bit stream.

6. The method of claim 5, wherein the reliability assignment values are chosen based on the bit position of the coded bit stream corresponding to the symbol being decoded and one or more pre-defined reliability assignment values.

7. An apparatus comprising:

a transmitter is arranged to receive an input bit stream, to generate a coded bit stream of N bits by encoding a first portion of K bits of the input bit stream using low density parity check coding technique and an un-coded bit stream of N/3 bits a second portion of the input bit stream, and to produce a combination by selecting at least N1 bits from the coded bit stream and N1/3 bits from the un-coded bit stream, to determine a symbol, using a pulse amplitude modulation PAM-16 scheme, corresponding to the combination from a symbol set, wherein the symbol set comprises at least sixteen symbols, wherein information bits in each symbol is based on a code rate determined using size of the first portion and size of the coded bit stream,

a receiver to demodulate based on a reliability assignment, and

a front end device to transmit a signal corresponding to the symbol at a rate of at least 10 giga bits per second over a communication medium.

8. The apparatus of claim 7 the transmitter further comprises a mapper, wherein the mapper is to receive the coded bit stream comprising N bits and the un-coded bit stream comprising N/3 bits.

9. The apparatus of claim 8 further comprises an encoder to generate N bits by encoding the first portion of K bits using low density parity check coding technique.

10. The apparatus of claim 7, wherein the mapper is to generate the combination by selecting one bit out of the N/3 bits and three bits out of the N bits.

11. The apparatus of claim 7, wherein the mapper is to determine the symbol by selecting the symbol based on the bit-to-symbol mapping table.

12. The apparatus of claim 11 the mapper further comprises a content addressable memory to search a matching entry corresponding to the combination and to produce the symbol corresponding to the matching entry.

13. The apparatus of claim 7 the receiver further comprises:

a de-mapper, wherein the de-mapper is to generate the coded bit stream and the un-coded bit stream from a received signal;

a decoder to decode a coded bit stream to generate an extracted bit stream based on a reliability assignment values determined corresponding to each bit of the coded bit stream, and

a de-framer to generate a bit stream representing data.

14. The apparatus of claim 13, wherein the reliability assignment values are chosen based on the bit position of the coded bit stream corresponding to the symbol being decoded and one or more pre-defined reliability assignment values.

15. The apparatus of claim 7 includes a transceiver.

16. A system comprising:

a network interface to generate and transfer a signal that is representative of a bit stream and that comprises symbols selected from at least one of sixteen symbols,

a processor to provide the network interface with the bit stream in response to executing instructions,

a memory to store the instructions executed by the processor,

the network interface further comprises a transmitter to receive a bit stream, to generate a coded bit stream of N bits by encoding a first portion of K bits of the input bit stream using low density parity check coding technique and an un-coded bit stream of N/3 bits from a second portion of the bit stream and to produce a combination by selecting at least N1 bits from the coded bit stream and N1/3 bits from the un-coded bit stream, to determine a symbol, using a pulse amplitude modulation PAM-16 scheme, corresponding to the combination from a symbol set, wherein the symbol set comprises at least sixteen symbols, wherein information bits in each symbol is based on a code rate determined using size of the first portion and size of the coded bit stream, and

a front end device to transmit a signal corresponding to the symbol at a rate of at least 10 giga bits per second over a communication medium.

17. The system of claim 16, wherein the network interface is to generate the signal as a pulse amplitude modulated signal having a rate of at least 10 giga bits per second.

18. The system of claim 17, the transmitter further comprises a mapper, wherein the mapper is to receive the coded bit stream comprising N bits and the un-coded bit stream comprising N/3 bits.

19. The system of claim 17, wherein the mapper is to generate the combination by selecting one bit out of the N/3 bits and three bits out of the N bits.

20. The system of claim 17, wherein the mapper is to determine the symbol by selecting the symbol based on the bit-to-symbol mapping table.

21. The system of claim 17 the mapper further comprises a content addressable memory to search a matching entry corresponding to the combination and to produce the symbol corresponding to the matching entry.

22. The system of claim 17 the network interface further comprises a receiver comprising:

a de-mapper to generate the coded bit stream and the un-coded bit stream from a received signal;

a decoder to decode the coded bit stream to generate an extracted bit stream based on reliability assignment values determined corresponding to each bit of the coded bit stream, and

a de-framer to generate a bit stream representing data.

23. The system of claim 17 the network interface includes a network interface card.

24. The system of claim 23 the network interface card includes logic capable of communicating at least in accordance with 10GBase-T standard.