Primary side control circuit and method for ultra-low idle power operation
First Claim
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1. A power supply with a primary side and a secondary side, wherein said power supply is configured with an ultra-low idle power mode, said power supply comprising:
- a primary circuit on the primary side, wherein said primary circuit is configured to receive power from an outside power source;
a control circuit on the primary side, wherein said control circuit is configured to monitor said primary circuit and to control said primary circuit such that said primary circuit is substantially disabled in response to detection of an idle power mode;
a secondary circuit on the secondary side, wherein said secondary circuit is coupled to said primary circuit and configured to provide a power output; and
wherein said control circuit monitors at least one of a duty cycle or a switching rate within said primary circuit to determine whether a power level of said power supply is above or below a predetermined threshold.
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Abstract
A method and circuit for reducing power consumption during idle mode to ultra-low levels, such as about 1/10th to 1/1000th or less of active power is disclosed. An ultra-low idle power supply comprises a primary circuit, a secondary circuit and a control circuit. The control circuit monitors behavior of the primary circuit and determines whether an idle state or no load condition exists, and if so the primary circuit is disengaged. By disengaging the primary circuit, the power consumption of the ultra-low idle power supply is reduced to ultra-low levels.
91 Citations
18 Claims
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1. A power supply with a primary side and a secondary side, wherein said power supply is configured with an ultra-low idle power mode, said power supply comprising:
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a primary circuit on the primary side, wherein said primary circuit is configured to receive power from an outside power source; a control circuit on the primary side, wherein said control circuit is configured to monitor said primary circuit and to control said primary circuit such that said primary circuit is substantially disabled in response to detection of an idle power mode; a secondary circuit on the secondary side, wherein said secondary circuit is coupled to said primary circuit and configured to provide a power output; and wherein said control circuit monitors at least one of a duty cycle or a switching rate within said primary circuit to determine whether a power level of said power supply is above or below a predetermined threshold. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A primary side circuit configured to facilitate an ultra-low idle power mode in a power supply, said primary side circuit comprising:
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an input circuit configured for filtering and rectifying input power; an energy storage circuit coupled to said input circuit; a modulator coupled to said energy storage circuit, said modulator configured for modulating the input power at a high frequency rate to drive a transformer and transfer power from a primary side of said transformer to a secondary side of said transformer; and wherein said primary side circuit is in communication with a control circuit on a primary side of said power supply, and wherein said control circuit is configured to monitor at least one of a duty cycle or a switching rate of said modulator and to control said primary side circuit such that said primary side circuit is substantially disabled in response to said control circuit determining that substantially no load exists such that said power supply transitions to an ultra-low idle power mode. - View Dependent Claims (9, 10, 11, 12, 13)
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14. A method of facilitating a power supply with ultra-low power consumption during idle power operation, said method comprising:
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monitoring, using a control circuit in communication with a primary circuit on a primary side of said power supply, at least one of a duty cycle or a switching rate of said primary circuit of said power supply and determining if substantially no load condition exists; and substantially disabling, using said control circuit, said primary circuit of said power supply in response to said substantially no load condition being detected to result in an ultra-low power mode. - View Dependent Claims (15, 16, 17, 18)
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Specification