Method and system for defining and controlling algorithmic elements in a graphics display system

• US 7,782,316 B2
• Filed: 10/22/2004
• Issued: 08/24/2010
• Est. Priority Date: 03/07/2000
• Status: Active Grant

• Current Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Original Assignee: Microsoft Corporation
• Inventors: Toelle, Michael A., Boyd, Charles N.
• Primary Examiner(s): Wu; Xiao M
• Assistant Examiner(s): Tseng; Charles
• Application Number:
  US10/971,450
• Publication Number:
  US 20050086317A1
• Time in Patent Office: 2,132 Days
• Field of Search: 345/418, 345/419, 345/581, 345/619
• US Class Current: 345/418
• CPC Class Codes: G06T 15/005 General purpose rendering architectures

Abstract

An API is provided that enables programmability of a 3D chip, wherein programming or algorithmic elements written by the developer can be downloaded to the chip, thereby programming the chip to perform those algorithms. A developer writes a routine that is downloadable to a 3D graphics chip. There are also a set of algorithmic elements that are provided in connection with the API that have already been programmed for the developer, that are downloadable to the programmable chip for improved performance. Thus, a developer may download preexisting API objects to a 3D graphics chip. A developer adheres to a specific format for packing up an algorithmic element, or set of instructions, for implementation by a 3D graphics chip. The developer packs the instruction set into an array of numbers, by referring to a list of ‘tokens’ understood by the 3D graphics chip. This array of numbers in turn is mapped correctly to the 3D graphics chip for implementation of the algorithmic element by the 3D graphics chip.

Claims

1. A graphics processing unit (GPU) for processing data in a graphics system on behalf of a host, comprising:

an interface component that, upon receipt of at least one host graphics application programming interface (API) call, receives and unpackages a plurality of algorithmic elements from the at least one host graphics API call, wherein each algorithmic element is downloadable to the GPU as an instruction set packed into an array of numbers by a host graphics API, represents a computational algorithm, and contains one or more tokens selected by a developer from a list of tokens interpretable by the GPU, said array of numbers for the selected one or more tokens providing an instruction to be performed by at least one computational subunit of the GPU; and

a mapping component that maps the unpackaged plurality of algorithmic elements to at least one computational subunit of the GPU according to a pre-defined protocol for interpreting the at least one host graphics API call, thereby readying the GPU to implement the instructions for the tokens selected by the developer so as to perform the functionality represented by the plurality of algorithmic elements based on the developer'"'"'s selection of tokens interpretable by the GPU.

2. A GPU according to claim 1, further comprising:

a processing component that, upon receipt of at least one API call specifying graphics data for processing according to the functionality represented by the plurality of algorithmic elements, processes said graphics data according to said functionality.

3. A GPU according to claim 2, wherein said graphics data is vertex data specifying at least one vertex of a graphics object.

4. A GPU according to claim 2, wherein said graphics data is pixel data specifying at least one pixel of a graphics object.

5. A GPU according to claim 1, wherein said receipt of at least one host graphics API call by the interface component includes receipt of said array of numbers.

6. A GPU according to claim 5, whereby said interface component unpackages the plurality of algorithmic elements from the array of numbers.

7. A GPU according to claim 6, whereby said interface component unpackages the plurality of algorithmic elements from the array of numbers by referring to said list of tokens interpretable by the GPU.

8. A GPU according to claim 1, whereby said mapping component maps the unpackaged plurality of algorithmic elements to at least one procedural shader of the GPU according to the pre-defined protocol.

9. A GPU according to claim 1, wherein the plurality of algorithmic elements comprise instructions for at least one of lighting, colorizing, mapping, texturizing, surfacing, shading, and enhancing an image.

10. A GPU according to claim 1, wherein said interface component unpackages said plurality of algorithmic elements based on a declaration portion included in said host graphics API call.

11. A GPU according to claim 10, wherein said declaration portion includes assignment information for assigning at least one input register of the at least one computational subunit to corresponding data streams specified by said host graphics API call.

12. A GPU according to claim 11, wherein said assignment information is for assigning at least one input register to a data element within a data stream.

13. A GPU according to claim 12, wherein said assignment information is for assigning at least one input register to a vertex element within a vertex stream.

14. A GPU according to claim 13, wherein the vertex element of the vertex stream is identified by a byte offset within the vertex stream and a type.

15. A GPU according to claim 10, wherein said declaration portion includes assignment information for assigning at least one input register of the at least one computational subunit to data output from a tessellator subunit of the GPU.

16. A GPU according to claim 10, wherein said declaration portion includes assignment information for assigning values to constant memory of the at least one computational subunit.

17. A GPU according to claim 16, wherein said assignment information includes a token that specifies values for one or more contiguous groups of storage locations of the constant memory of the at least one computational subunit.

18. A GPU according to claim 16, wherein said declaration portion includes assignment information for updating an arbitrary subset of the constant memory, including assignment information for overwriting the device state.

19. A GPU according to claim 10, wherein said declaration portion includes at least one stream selector token followed by a contiguous set of stream data definition tokens.

20. A GPU according to claim 19, wherein the contiguous set of stream data definition tokens define a stream, including the set of elements within the stream, the order in which the elements of the stream appear, the type of each element, and the register into which to load each element.

21. A GPU according to claim 20, wherein a stream is allowed to include at least one element which is not loaded into a register.

22. A GPU according to claim 1, wherein the interface component further transmits data objects to the GPU in respective data containers in parallel.

23. A video card comprising:

a video memory; and

a graphics processing unit (GPU) comprising;

an interface component that, upon receipt of at least one host graphics application programming interface (API) call, receives and unpackages a plurality of algorithmic elements from the at least one host graphics API call, wherein each algorithmic element is downloadable to the GPU as an instruction set packed into an array of numbers by a host graphics API, represents a computational algorithm, and contains one or more tokens selected by a developer from a list of tokens interpretable by the GPU, said array of numbers for the selected one or more tokens providing an instruction to be performed by at least one computational subunit of the GPU; and

a mapping component that maps the unpackaged plurality of algorithmic elements to at least one computational subunit of the GPU according to a pre-defined protocol for interpreting the at least one host graphics API call, thereby readying the GPU to implement the instructions for the tokens selected by the developer so as to perform the functionality represented by the plurality of algorithmic elements based on the developer'"'"'s selection of tokens interpretable by the GPU.

24. A video card according to claim 23, wherein the interface component further transmits data objects to the GPU in respective data containers in parallel.