Simplified digital predistortion in a time-domain duplexed transceiver
First Claim
1. A transceiver for time-domain duplexed (TDD) communications comprising:
- a baseband processor;
digital predistortion (DPD) circuit that is coupled to the baseband processor;
a digital-to-analog converter (DAC) that is coupled to the DPD circuitry;
a local oscillator;
a first mixer that is coupled to the DAC and the local oscillator;
a power amplifier that is coupled to the mixer;
receiver circuitry that is coupled to the power amplifier, wherein receiver circuitry includes a filter;
a second mixer that is coupled to the local oscillator and at least a portion of the receiver circuitry;
an analog-to-digital converter (ADC) that is coupled to the second mixer, the baseband processor, and the DPD circuitry, wherein the filter is coupled between the second mixer and the ADC; and
a switch that is substantially in parallel to at least a portion of the receiver circuitry between the power amplifier and the ADC, wherein the switch is actuated so as to provide an output from the power amplifier to the ADC during transmit periods of a TDD cycle, and wherein the switch is actuated so as to isolate the output from the ADC during receive periods of the TDD cycle.
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Accused Products
Abstract
A transceiver for time-domain duplexed (TDD) communications, for example in connection with wireless broadband data communications, is disclosed. The transceiver includes digital predistortion compensation circuitry, which compensates the digital signals to be transmitted based on feedback signals from the output of the power amplifier, in order to linearize the output from the power amplifier. The feedback signals from the power amplifier are coupled back to the digital predistortion circuitry over part of the same receive path as the received signals from the wireless communications channel. The shared path includes analog-to-digital converters that are used both in the transmit period of the TDD cycle to convert the feedback signals from the power amplifier output, and in the receive period of the TDD cycle to convert the analog received signals.
29 Citations
13 Claims
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1. A transceiver for time-domain duplexed (TDD) communications comprising:
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a baseband processor; digital predistortion (DPD) circuit that is coupled to the baseband processor; a digital-to-analog converter (DAC) that is coupled to the DPD circuitry; a local oscillator; a first mixer that is coupled to the DAC and the local oscillator; a power amplifier that is coupled to the mixer; receiver circuitry that is coupled to the power amplifier, wherein receiver circuitry includes a filter; a second mixer that is coupled to the local oscillator and at least a portion of the receiver circuitry; an analog-to-digital converter (ADC) that is coupled to the second mixer, the baseband processor, and the DPD circuitry, wherein the filter is coupled between the second mixer and the ADC; and a switch that is substantially in parallel to at least a portion of the receiver circuitry between the power amplifier and the ADC, wherein the switch is actuated so as to provide an output from the power amplifier to the ADC during transmit periods of a TDD cycle, and wherein the switch is actuated so as to isolate the output from the ADC during receive periods of the TDD cycle. - View Dependent Claims (2, 3, 4)
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5. A transceiver for TDD communications comprising:
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a baseband processor; digital predistortion (DPD) circuit that is coupled to the baseband processor; a digital-to-analog converter (DAC) that is coupled to the DPD circuitry; a local oscillator; a first mixer that is coupled to the DAC and the local oscillator; a power amplifier that is coupled to the mixer; receiver circuitry that is coupled to the power amplifier; a pair of second mixers that are each coupled to the local oscillator, wherein a first one of the pair of second mixers is coupled between first and second portions of the receiver circuitry; an analog-to-digital converter (ADC) that is coupled to the second mixer, the baseband processor, and the DPD circuitry; and a switch that is substantially in parallel to at least a portion of the receiver circuitry between the power amplifier and the ADC, wherein the switch is actuated so as to provide an output from the power amplifier to the ADC during transmit periods of a TDD cycle, and wherein the switch is actuated so as to isolate the output from the ADC during receive periods of the TDD cycle, and wherein a second one of the pair of second mixers is coupled between the power amplifier and the switch. - View Dependent Claims (6, 7)
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8. A transceiver for TDD communications comprising:
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a baseband processor; a digital upconverter that is coupled the baseband processor; DPD circuit that is coupled to the digital upconverter, wherein the DPD circuit receives an a first in-phase (I) signal and a first quadrature (Q) signal from the digital upconverter; a first DAC that is coupled to the DPD circuitry so as to receive a second I signal; a second DAC that is coupled to the DPD circuitry so as to receive a second Q signal; a local oscillator; a first mixer that is coupled to the first DAC, the second DAC, and the local oscillator, wherein the first mixer receives a third I signal from the first DAC and receives a third Q signal from the second DAC; a power amplifier that is coupled to the mixer; receiver circuitry that is couple to the power amplifier, wherein receiver circuitry includes a filter; a second mixer that is coupled to the at least a portion of the receiver circuitry and the amplifier; a first ADC that is coupled to the second mixer, the baseband processor, and the DPD circuitry, wherein the first ADC receives a fourth I signal from the second mixer; a second ADC that is coupled to the second mixer, the baseband processor, and the DPD circuitry, wherein the second ADC receives a fourth Q signal from the second mixer, and wherein the filter that is coupled between the second mixer and the each of the first and second ADCs; a digital downconverter that is coupled between each of the first and second ADCs and the baseband processor; and a switch that is substantially in parallel to at least a portion of the receiver circuitry between the power amplifier and each of the first and second ADCs, wherein the switch is actuated so as to provide an output from the power amplifier to each of the first and second ADCs during transmit periods of a TDD cycle, and wherein the switch is actuated so as to isolate the output from each of the first and second ADCs during receive periods of the TDD cycle. - View Dependent Claims (9, 10)
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11. A transceiver for TDD communications comprising:
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a baseband processor; a digital upconverter that is coupled the baseband processor; DPD circuit that is coupled to the digital upconverter, wherein the DPD circuit receives an a first I signal and a first Q signal from the digital upconverter; a first DAC that is coupled to the DPD circuitry so as to receive a second I signal; a second DAC that is coupled to the DPD circuitry so as to receive a second Q signal; a local oscillator; a first mixer that is coupled to the first DAC, the second DAC, and the local oscillator, wherein the first mixer receives a third I signal from the first DAC and receives a third Q signal from the second DAC; a power amplifier that is coupled to the mixer; receiver circuitry that is couple to the power amplifier; a pair of second mixers that are each coupled to the local oscillator, wherein a first one of the pair of second mixers is coupled between first and second portions of the receiver circuitry; a first ADC that is coupled to the second mixer, the baseband processor, and the DPD circuitry, wherein the first ADC receives a fourth I signal from the second mixer; a second ADC that is coupled to the second mixer, the baseband processor, and the DPD circuitry, wherein the second ADC receives a fourth Q signal from the second mixer; a digital downconverter that is coupled between each of the first and second ADCs and the baseband processor; and a switch that is substantially in parallel to at least a portion of the receiver circuitry between the power amplifier and each of the first and second ADCs, wherein the switch is actuated so as to provide an output from the power amplifier to each of the first and second ADCs during transmit periods of a TDD cycle, and wherein the switch is actuated so as to isolate the output from each of the first and second ADCs during receive periods of the TDD cycle, and wherein a second one of the pair of second mixers is coupled between the power amplifier and the switch. - View Dependent Claims (12, 13)
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Specification