Isolating chip-to-chip contact

• US 7,785,987 B2
• Filed: 01/30/2009
• Issued: 08/31/2010
• Est. Priority Date: 06/14/2005
• Status: Active Grant

• Current Assignee: Cufer Asset Ltd LLC (Intellectual Ventures LLC)
• Original Assignee: Cufer Asset Ltd LLC (Intellectual Ventures LLC)
• Inventors: Trezza, John
• Primary Examiner(s): Nguyen; Ha Tran T
• Assistant Examiner(s): Dehne; Aaron A
• Application Number:
  US12/363,438
• Publication Number:
  US 20090137116A1
• Time in Patent Office: 578 Days
• Field of Search: 438/455, 438/667, 438/456, 257/E23.128, 257/E21.519
• US Class Current: 438/456
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 21/6836 Wafer tapes, e.g. grinding or dicing support tapes adhesive tapes in general C09J7/20
• CPC Class Codes: H01L 21/76898 formed through a semiconductor substrate
• CPC Class Codes: H01L 2221/68327 used during dicing or grinding
• CPC Class Codes: H01L 2221/6834 used to protect an active side of a device or wafer
• CPC Class Codes: H01L 2221/68359 used as a support during manufacture of interconnect decals or build up layers
• CPC Class Codes: H01L 2221/68363 used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
• CPC Class Codes: H01L 2223/6616 Vertical connections, e.g. vias
• CPC Class Codes: H01L 2224/05001 Internal layers
• CPC Class Codes: H01L 2224/05022 the internal layer being at least partially embedded in the surface
• CPC Class Codes: H01L 2224/05023 the whole internal layer protruding from the surface
• CPC Class Codes: H01L 2224/05026 the internal layer being disposed in a recess of the surface
• CPC Class Codes: H01L 2224/05027 the internal layer extending out of an opening
• CPC Class Codes: H01L 2224/0508 being stacked
• CPC Class Codes: H01L 2224/05147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/05568 the whole external layer protruding from the surface
• CPC Class Codes: H01L 2224/05572 the external layer extending out of an opening
• CPC Class Codes: H01L 2224/05573 Single external layer
• CPC Class Codes: H01L 2224/05644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/05655 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/05664 : Palladium [Pd] as principal constituent
• CPC Class Codes: H01L 2224/05666 : Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/0615 : Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry
• CPC Class Codes: H01L 2224/1147 : using a lift-off mask
• CPC Class Codes: H01L 2224/13012 : in top view
• CPC Class Codes: H01L 2224/13099 : Material
• CPC Class Codes: H01L 2224/13147 : Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/13609 : Indium [In] as principal constituent
• CPC Class Codes: H01L 2224/16 : of an individual bump connector
• CPC Class Codes: H01L 2224/75305 : comprising protrusions
• CPC Class Codes: H01L 2224/81193 : wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/8121 : using a reflow oven
• CPC Class Codes: H01L 2224/81815 : Reflow soldering
• CPC Class Codes: H01L 2225/06513 : Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
• CPC Class Codes: H01L 2225/06524 : Electrical connections formed on device or on substrate, e.g. a deposited or grown layer
• CPC Class Codes: H01L 2225/06527 : Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
• CPC Class Codes: H01L 2225/06541 : Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV] manufacturing via connections per se H01L21/76898
• CPC Class Codes: H01L 2225/06589 : Thermal management, e.g. cooling
• CPC Class Codes: H01L 2225/06593 : Mounting aids permanently on device; arrangements for alignment use of temporary supports H01L21/6835
• CPC Class Codes: H01L 2225/06596 : Structural arrangements for testing testing or measuring during manufacture or treatment H01L22/00; testing electrical properties or locating electrical faults G01R31/00
• CPC Class Codes: H01L 23/427 : Cooling by change of state, e.g. use of heat pipes by liquefied gas H01L23/445
• CPC Class Codes: H01L 23/48 : Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
• CPC Class Codes: H01L 23/481 : Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 23/49827 : Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 23/552 : Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 24/11 : Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 24/13 : of an individual bump connector
• CPC Class Codes: H01L 24/75 : Apparatus for connecting with bump connectors or layer connectors
• CPC Class Codes: H01L 24/81 : using a bump connector
• CPC Class Codes: H01L 25/0652 : the devices being arranged next and on each other, i.e. mixed assemblies
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 25/50 : Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01004 : Beryllium [Be]
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01012 : Magnesium [Mg]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01018 : Argon [Ar]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01024 : Chromium [Cr]
• CPC Class Codes: H01L 2924/01025 : Manganese [Mn]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/0103 : Zinc [Zn]
• CPC Class Codes: H01L 2924/01032 : Germanium [Ge]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01042 : Molybdenum [Mo]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01049 : Indium [In]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01051 : Antimony [Sb]
• CPC Class Codes: H01L 2924/01061 : Promethium [Pm]
• CPC Class Codes: H01L 2924/01073 : Tantalum [Ta]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01075 : Rhenium [Re]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/04953 : TaN
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/10329 : Gallium arsenide [GaAs]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H01L 2924/3011 : Impedance
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: Y10T 428/24174 : including sheet or component perpendicular to plane of web or sheet

Abstract

An apparatus has two slabs of substrate material joined to each other, the two slabs including a pair of contacts joined to each other having a shape separating a first area from a second area.

Claims

1. A method of bonding electrical contacts, the method comprising:

forming a first contact on a first semiconductor by applying a rigid material to the first semiconductor;

forming a second contact on a second semiconductor by applying a malleable material to the second semiconductor;

providing the first contact in engagement with the second contact; and

heating the first and second contacts to a first temperature, thereby forming a bond between the first and second contacts, wherein the bond defines a metallic seal between the first and second semiconductors that segregates a first volume on one side of the metallic seal from a second volume on another side of the metallic seal, and wherein the first temperature is less than a temperature that would cause the malleable material to become liquidus; and

cooling the first and second contacts.

2. The method of claim 1, further comprising heating the first and second contacts to a second temperature, wherein the second temperature is equal to or greater than a fuse temperature but less than a temperature that would cause the rigid material to become liquidus.

3. The method of claim 2, wherein said forming a first contact further comprises forming a well structure, wherein the well structure is configured to constrain malleable material that becomes liquidus during the heating and cooling of the contacts.

4. The method of claim 1, wherein the metallic seal forms a hermetic barrier between the first volume and the second volume.

5. The method of claim 1, wherein said applying a rigid material comprises depositing the rigid material via a sputter deposition process.

6. The method of claim 1, wherein said applying a rigid material comprises plating the rigid material onto a seed material using an electroplating technique.

7. The method of claim 6, wherein the electroplating technique comprises one of a thin-resist electroplating technique or a thick-resist electroplating technique.

8. The method of claim 1, wherein said applying a rigid material comprises plating the rigid material onto a seed material using an electroless plating technique.

9. The method of claim 1, wherein at least one of the first or second contacts extends into at least a portion of one of the first or second semiconductors.

10. The method of claim 1, wherein said providing the first contact in engagement with the second contact causes the rigid material to penetrate into the malleable material.

11. The method of claim 1, wherein the rigid material comprises one of Al, Au, Co, Cr, Cu, Ni, Pd, Pt, Ta, W, or an alloy thereof.

12. The method of claim 1, wherein the malleable material comprises one of Sn, In, Pb, Bi, Al, Zn, Mg, or an alloy thereof.

13. The method of claim 1, wherein the first and second contacts are coupled to ground.

14. The method of claim 1, wherein the malleable material comprises a metal or alloy having a melting temperature at least 50°

C. lower than a melting temperature of the rigid material.

15. The method of claim 1, wherein the rigid material comprises a metal or alloy having a melting temperature at least 50°

C. higher than a melting temperature of the malleable material but lower than 1050°

C.

16. The method of claim 1, wherein the metallic seal is configured to protect a device located within the first volume.

17. The method of claim 16, wherein the device comprises one of a connection pad, an input/output pad, or an optical device.

18. The method of claim 1, wherein the first and second contacts are configured to allow testing of at least one of the first or second semiconductors.

19. The method of claim 1, wherein the first semiconductor comprises an integrated circuit chip having at least one electrically conductive via passing through at least a portion of the chip, wherein at least a portion of the electrically conductive via is connected to an electrical contact on the second semiconductor, and wherein at least one of the portion of the electrically conductive via, the electrical contact, or a conductive path connecting the portion of the electrically conductive via to the electrical contact is located within the first volume.

20. The method of claim 1, wherein the second contact does not comprise a solder.

21. The method of claim 1, further comprising penetrating the first contact into the second contact.