Method for fabricating self-aligned complementary pillar structures and wiring
First Claim
Patent Images
1. A method of making a semiconductor device, comprising:
- forming at least one device layer over a substrate;
forming at least two spaced apart features over the at least one device layer;
forming sidewall spacers on the at least two spaced apart features;
selectively removing the at least two spaced apart features;
filling a space between the sidewall spacers with a plurality of filler features;
selectively removing the sidewall spacers to leave the plurality of filler features spaced apart from each other; and
etching the at least one device layer using the plurality of filler features as a mask;
wherein the at least two spaced apart features comprise a plurality of features; and
wherein the step of forming sidewall spacers comprises forming the sidewall spacers on the plurality of spaced apart features, such that the sidewall spacers on adjacent features along at least two predetermined directions contact each other to form fully enclosed interstitial spaces located between the sidewall spacers;
wherein;
the spaced apart features comprise an electrically conductive material covered by a hard mask material;
the plurality of filler features comprise an electrically conductive material; and
the sidewall spacers comprise an electrically insulating material.
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Abstract
A method of making a semiconductor device includes forming at least one device layer over a substrate, forming at least two spaced apart features over the at least one device layer, forming sidewall spacers on the at least two features, selectively removing the spaced apart features, filling a space between a first sidewall spacer and a second sidewall spacer with a filler feature, selectively removing the sidewall spacers to leave a plurality of the filler features spaced apart from each other, and etching the at least one device layer using the filler feature as a mask.
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Citations
16 Claims
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1. A method of making a semiconductor device, comprising:
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forming at least one device layer over a substrate; forming at least two spaced apart features over the at least one device layer; forming sidewall spacers on the at least two spaced apart features; selectively removing the at least two spaced apart features; filling a space between the sidewall spacers with a plurality of filler features; selectively removing the sidewall spacers to leave the plurality of filler features spaced apart from each other; and etching the at least one device layer using the plurality of filler features as a mask; wherein the at least two spaced apart features comprise a plurality of features; and wherein the step of forming sidewall spacers comprises forming the sidewall spacers on the plurality of spaced apart features, such that the sidewall spacers on adjacent features along at least two predetermined directions contact each other to form fully enclosed interstitial spaces located between the sidewall spacers; wherein; the spaced apart features comprise an electrically conductive material covered by a hard mask material; the plurality of filler features comprise an electrically conductive material; and the sidewall spacers comprise an electrically insulating material. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method of making a pillar shaped nonvolatile memory device array, comprising:
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forming a plurality of bottom electrodes over a substrate; forming at least one semiconductor device layer over the plurality of bottom electrodes; forming a plurality of spaced apart features over the at least one semiconductor device layer; forming a plurality of sidewall spacers on the plurality of spaced apart features; selectively removing the spaced apart features to leave the plurality of sidewall spacers spaced apart from each other; forming a filler film over and between the plurality of sidewall spacers; planarizing the filler film to expose upper portions of the sidewall spacers to leave a plurality of filler features located between the sidewall spacers; selectively removing the plurality of sidewall spacers to leave the plurality of filler features spaced apart from each other; etching the at least one semiconductor device layer using the plurality of filler features as a mask to form a plurality of pillar shaped diode containing nonvolatile memory cells; and forming a plurality of upper electrodes contacting the plurality of nonvolatile memory cells. - View Dependent Claims (12, 13, 14, 15)
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16. A method of making a semiconductor device, comprising:
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forming at least one device layer over a substrate; forming at least two spaced apart features over the at least one device layer; forming sidewall spacers on the at least two spaced apart features; selectively removing the at least two spaced apart features; filling a space between the sidewall spacers with a plurality of filler features; selectively removing the sidewall spacers to leave the plurality of filler features spaced apart from each other; and etching the at least one device layer using the plurality of filler features as a mask; wherein; the spaced apart features comprise an electrically conductive material covered by a hard mask material; the plurality of filler features comprise an electrically conductive material; and the sidewall spacers comprise an electrically insulating material.
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Specification