Double-sided package for power module

• US 7,786,486 B2
• Filed: 08/02/2006
• Issued: 08/31/2010
• Est. Priority Date: 08/02/2005
• Status: Expired due to Fees

• Current Assignee: Perfect Galaxy International Limited
• Original Assignee: Satcon Technology Corporation
• Inventors: Borowy, Bogdan Szczepan, Davis, Gregg Herbert, Casey, Leo Francis, Connell, James William III
• Primary Examiner(s): Pert; Evan
• Assistant Examiner(s): SODERHOLM, KRISTA Z
• Application Number:
  US11/497,804
• Publication Number:
  US 20070057284A1
• Time in Patent Office: 1,490 Days
• Field of Search: 257/706, 257/717, 257/E23.11, 257/E23.112, 257 76- 78
• US Class Current: 257/76
• CPC Class Codes: H01L 2224/131 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2224/13109 Indium [In] as principal constituent
• CPC Class Codes: H01L 2224/13139 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/13144 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/13147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/13169 Platinum [Pt] as principal constituent
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/2518 being disposed on at least two different sides of the body, e.g. dual array
• CPC Class Codes: H01L 2224/29076 being mutually engaged together, e.g. through inserts
• CPC Class Codes: H01L 2224/29144 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 2224/83801 Soldering or alloying
• CPC Class Codes: H01L 2224/83805 involving forming a eutectic alloy at the bonding interface
• CPC Class Codes: H01L 23/3675 characterised by the shape of the housing
• CPC Class Codes: H01L 23/373 Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
• CPC Class Codes: H01L 23/3733 having a heterogeneous or anisotropic structure, e.g. powder or fibres in a matrix, wire mesh, porous structures H01L23/3732, H01L23/3737 take precedence
• CPC Class Codes: H01L 23/3735 Laminates or multilayers, e.g. direct bond copper ceramic substrates
• CPC Class Codes: H01L 23/49833 the chip support structure consisting of a plurality of insulating substrates
• CPC Class Codes: H01L 23/5385 Assembly of a plurality of insulating substrates
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 25/115 : the devices being arranged next to each other
• CPC Class Codes: H01L 25/18 : the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01019 : Potassium [K]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/10272 : Silicon Carbide [SiC]
• CPC Class Codes: H01L 2924/1305 : Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13055 : Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/30107 : Inductance

Abstract

An electronic semiconductor package is described. The package has a wide band gap electronic semiconductor device requiring heat removal. On one side of the electronic semiconductor device is a first, thermally-conductive, electrically-insulative substrate having a predetermined electrically-conductive wire pattern affixed thereto. On the other side of the electronic semiconductor device is a second, thermally-conductive, electrically-insulative substrate. A heat removal device is mechanically-coupled to the second substrate. The heat removal device is made of a graphite-metal or metal-matrix composite material and a fin array structure of the same material. The coefficients of thermal expansion of the heat removal device and the first and second substrates are matched to minimize internal and external stresses.

Claims

1. An electronic semiconductor package comprising:

at least one electronic semiconductor device, which is manufactured from a semiconductor material consisting essentially of a wide band gap semiconductor, having first and second opposing sides, said second side of said at least one electronic, wide band gap semiconductor device having a plurality of electrical contact elements;

a first layer having first and second opposing sides, said first layer including a first electrically insulating and thermally conductive substrate and a first predetermined electrically conductive wiring pattern affixed thereto, said first predetermined electrically conductive wiring pattern electrically mated to selected locations of said plurality of electrical contact elements on said second side of said at least one electronic semiconductor device;

a heat removal device that includes a graphite-metal composite portion or a metal-matrix composite portion, to remove heat from the at least one electronic semiconductor device by conduction; and

a second layer having first and second opposing sides, said second layer including a second electrically insulating and thermally conductive substrate, said first side of said second layer being thermally coupled to said heat removal device and said second side of said second layer being thermally coupled to said first side of said at least one electronic semiconductor device,

wherein the graphite-metal composite portion or the metal-matrix composite portion of the heat removal device is thermally-coupled to the second electrically-insulating, thermally-conductive substrate.

2. The electronic semiconductor package of claim 1, wherein coefficients of thermal expansion of the at least one electronic semiconductor device, the first layer, the second layer and the heat removal device are matched.

3. The electronic semiconductor package of claim 1, wherein the at least one electronic semiconductor device is manufactured of a semiconductor material that consists essentially of a wide band gap material selected from the group comprising silicon carbide (SiC), gallium nitride (GaN) or diamond.

4. The electronic semiconductor package of claim 1, wherein the first and second electrically-insulating, thermally-conductive substrates are made of a dielectric, ceramic material selected from the group comprising aluminum nitride, aluminum oxide, alumina, and berylia.

5. The electronic semiconductor package of claim 1, wherein the graphite-metal composite portion or the metal-matrix composite portion comprises thermally-anisotropic, integrated dielectric materials and graphite materials.

6. The electronic semiconductor package of claim 1, wherein dielectric material used in the second electrically-insulating, thermally-conductive substrate is included in the graphite-metal composite portion or the metal-matrix composite portion.

7. The electronic semiconductor package of claim 1, wherein the graphite-metal composite portion or the metal-matrix composite portion comprises a three-dimensional skeletal structure of graphite that is structured and arranged in a metal matrix.

8. The electronic semiconductor package of claim 7, wherein the three-dimensional skeletal structure of graphite includes high k-carbon fibers that are oriented orthogonal to an xy-plane in said metal matrix, to provide thermal conductivity in an orthogonal, z-direction with respect to the plane.

9. The electronic semiconductor package of claim 7, wherein the three-dimensional skeletal structure of graphite provides a coefficient of thermal expansion matching between material layers within the over-casting.

10. The electronic semiconductor package of claim 7, wherein the metal matrix is aluminum or copper.

11. The electronic semiconductor package of claim 1, wherein the heat removal device further includes a fin array structure that is thermally-coupled to the graphite-metal composite portion or the metal-matrix composite portion, to remove heat from said graphite-metal composite portion or metal-matrix composite portion by convection.

12. The electronic semiconductor package of claim 11, wherein the graphite-metal composite portion or the metal-matrix composite portion and the fin array structure are made of thermally-conductive materials selected from the group comprising graphite or aluminum silicon carbide.

13. The electronic semiconductor package of claim 11, wherein the fin array structure comprises a plurality of fins having a channel disposed between adjacent fins for receiving a fluid.

14. The electronic semiconductor package of claim 1, wherein said second layer has a thickness range between about 5 and about 25 mils.

15. The electronic semiconductor package of claim 1, wherein the second layer includes a second predetermined electrically conductive wiring pattern wherein selected locations on said second predetermined electrically conductive wiring pattern are electrically mated to contact elements on the first side of said at least one electronic semiconductor device.

16. The electronic semiconductor package of claim 1, further comprising a second heat removal device that is thermally-coupled to said second side of said first layer.

17. The electronic semiconductor package of claim 16, wherein said second heat removal device includes a graphite-metal composite portion or a metal-matrix composite portion that is thermally-coupled to the first electrically-insulating, thermally-conductive substrate, to remove heat from the at least one electronic semiconductor device by conduction.

18. The electronic semiconductor package of claim 17, wherein the second heat removal device further includes a fin array structure that is thermally-coupled to the graphite-metal composite portion or the metal-matrix composite portion, to remove heat from said graphite-metal composite portion or said metal-matrix composite portion by convection.

19. The electronic semiconductor package of claim 18, wherein the graphite-metal composite portion or the metal-matrix composite portion and the fin array structure are made of thermally-conductive materials selected from the group comprising graphite or aluminum silicon carbide.