High-voltage vertical transistor with edge termination structure

• US 7,786,533 B2
• Filed: 02/03/2005
• Issued: 08/31/2010
• Est. Priority Date: 09/07/2001
• Status: Expired due to Fees

• Current Assignee: Power Integrations Incorporated
• Original Assignee: Power Integrations Incorporated
• Inventors: Disney, Donald Ray
• Primary Examiner(s): Le; Thao X
• Assistant Examiner(s): Kraig; William F
• Application Number:
  US11/050,072
• Publication Number:
  US 20050167749A1
• Time in Patent Office: 2,035 Days
• Field of Search: 257328-333, 257/341, 257/342, 257/401, 257/409, 257/487, 257/488, 257/496, 257/520, 257/135, 257/E29.009, 257/E29.011, 257/E29.012, 257/E29.014, 438/140, 438/192, 438/454
• US Class Current: 257/341
• CPC Class Codes: H01L 29/0653 adjoining the input or output region of a field-effect device, e.g. the source or drain region
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/402 Field plates
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41741 for vertical or pseudo-vertical devices
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/7802 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7824 with a substrate comprising an insulating layer, e.g. SOI-LDMOS transistors
• CPC Class Codes: H01L 29/7828 without inversion channel, e.g. vertical ACCUFETs, normally-on vertical MISFETs

Abstract

A high-voltage transistor includes a drain, a source, and one or more drift regions extending from the drain toward the source. A field plate member laterally surrounds the drift regions and is insulated from the drift regions by a dielectric layer. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).

Claims

1. A high-voltage transistor comprising:

a substrate having a top surface;

a drain of a first conductivity type;

a plurality of source regions of the first conductivity type;

a plurality of drift regions of the first conductivity type, each extending in a vertical direction from the drain toward the source, adjacent ones of the drift regions being separated in a first lateral direction by a dielectric layer, each of the drift regions terminating in a second lateral direction in a fingertip area;

a plurality of body regions of a second conductivity type, each body region separating a corresponding one of the source regions from a corresponding one of the drift regions;

a field plate member disposed within the dielectric layer that surrounds each of the drift regions in the first and second lateral directions, the field plate member having an entire length that extends in the vertical direction from a beginning at the top surface of the substrate downward to a farthest end of the field plate member, an inner region of the dielectric layer laterally separating the drift regions from the field plate member and an outer region of the dielectric layer laterally separating the field plate member from a perimeter semiconductor region of the substrate that extends in the vertical direction downward from the top surface, the perimeter semiconductor region being of the first conductivity type, the inner and outer regions each having a width that is substantially the same at all points along the entire length of the field plate member; and

a plurality of gates, each gate being disposed in the dielectric layer adjacent to and insulated from a corresponding one of the body regions, application of a voltage potential to the gate causing a vertical conduction channel to form in the body region such that current flows between the source regions and the drain when the high-voltage transistor is in an on-state.

2. The high-voltage transistor according to claim 1 wherein the fingertip area has a rounded shape.

3. The high-voltage transistor according to claim 1 wherein each of the drift regions has a width in the first lateral direction that is substantially equal.

4. The high-voltage transistor according to claim 1 wherein the width of the inner and outer regions is substantially the same at all points in the first and second lateral directions.

5. The high-voltage transistor according to claim 1 wherein the substrate comprises a planar bottom surface, the vertical direction being oriented perpendicular to the planar bottom surface and the lateral direction being oriented parallel to the planar bottom surface.

6. The high-voltage transistor according to claim 1 wherein each of the drift regions have a length oriented in the vertical direction and a width oriented in the first lateral direction, the length being more than five times the width.

7. The high-voltage transistor according to claim 1 wherein the first conductivity type comprises n-type.

8. The high-voltage transistor according to claim 1 wherein the field plate member extends in the vertical direction, oriented substantially parallel to the drift regions.

9. A high-voltage transistor comprising:

a substrate having a top surface;

a drain of a first conductivity type;

a source of the first conductivity type;

a body region of a second conductivity type opposite to the first conductivity type, the body region adjoining the source region, a conductive channel being formed in the body region when the high-voltage transistor is in an on-state such that current flows between the source and drain;

a drift region of the first conductivity type extending in a vertical direction from the drain to the body region;

a field plate member that laterally encircles the drift region, the field plate member being disposed in a dielectric layer, the field plate member having an entire length that extends in the vertical direction from a beginning at the top surface of the substrate downward to a farthest end of the field plate member, an inner region of the dielectric layer laterally separating the drift region from the field plate member and an outer region of the dielectric layer laterally separating the field plate member from a perimeter semiconductor region of the substrate that extends in the vertical direction downward from the top surface, the inner and outer regions each having a width that is substantially the same at all points along the entire length of the field plate member; and

an insulated gate disposed in the inner region of the dielectric layer adjacent the body region, application of a voltage potential to the insulated gate causing the conduction channel to form in the body region.

10. The high-voltage transistor according to claim 9 wherein the drift region extends in a lateral direction, terminating at each end in a rounded fingertip area.

11. The high-voltage transistor according to claim 10 wherein the substrate comprises a planar bottom surface, the vertical direction being oriented perpendicular to the planar bottom surface and the lateral direction being oriented parallel to the planar bottom surface.

12. The high-voltage transistor according to claim 9 wherein the perimeter semiconductor region extends from the top surface to a drain electrode formed on a bottom surface of the substrate.

13. The high-voltage transistor according to claim 9 wherein the perimeter semiconductor region is laterally separated from the field plate member by a distance that is substantially the same at all points along an outer edge of the field plate member.

14. The high-voltage transistor according to claim 9 wherein the drift region has a length oriented in the vertical direction and a width oriented in a first lateral direction, the length being more than five times the width.

15. A power transistor comprising:

a substrate having a top surface, an active device area, and a perimeter area of a first conductivity type, the active device area including;

a drain region of the first conductivity type;

a plurality of source regions of the first conductivity type, each source region being disposed at or near the top surface of the substrate;

a plurality of body regions of a second conductivity type, each body region being disposed beneath a corresponding one of the source regions; and

a plurality of drift regions of the first conductivity type extending in a vertical direction from a corresponding one of the body regions downward to the drain region, adjacent ones of the drift regions being separated in a first lateral direction by a dielectric layer, each of the drift regions terminating in a second lateral direction in a fingertip area;

a field plate member disposed within the dielectric layer that surrounds each of the drift regions in the first and second lateral directions, the field plate member having an entire length that extends in the vertical direction from a beginning at the top surface of the substrate downward to a farthest end of the field plate member, an inner region of the dielectric layer laterally separating the drift regions from the field plate member and an outer region of the dielectric layer laterally separating the field plate member from the perimeter area of the substrate, the inner and outer regions each having a width that is substantially the same at all points along the entire length of the field plate member, the perimeter area being laterally separated from the field plate member by a distance that is substantially the same at all points along an outer edge of the field plate member;

a gate disposed in the dielectric layer between a corresponding one of the body regions and the field plate member, application of a voltage potential to the gate causing a vertical conduction channel to form in the body region such that current flows between the source regions and the drain when the high-voltage transistor is in an on-state.

16. The power transistor of claim 15 wherein the perimeter area extends from the top surface to a drain electrode formed on a bottom surface of the substrate.

17. The power transistor of claim 15 wherein the substrate comprises a planar bottom surface, the vertical direction being oriented perpendicular to the planar bottom surface and the lateral direction being oriented parallel to the planar bottom surface.

18. The power transistor of claim 15 wherein the drift region has a length oriented in the vertical direction and a width oriented in a first lateral direction, the length being more than five times the width.

19. The power transistor of claim 15 wherein the perimeter area comprises a semiconductor region of the first conductivity type.