Configurable battery management system with embedded SRAM in chip architecture
First Claim
1. A battery management system, comprising:
- a battery management chip, having embedded SRAM module, CPU, ROM therein;
an external non-volatile memory module having a battery management program stored therein and said battery management program thereafter being down loaded into said SRAM in terms of a communication protocol while a host being turned ON or reset and restored said battery management program backed into said non-volatile memory module while said host being turned OFF so that said battery management chip can perform battery management.
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Accused Products
Abstract
A battery management system includes an external non-volatile memory and a battery management chip with embedded SRAM, CPU, ROM, and ROM_RAM encoder. The chip communicates with the non-volatile memory via standard protocols. While the battery management system is powered on or reset, a battery management program stored in the non-volatile memory is loaded to the embedded SRAM and the executed by CPU. As turning off this system, the program in the SRAM is then restored back the non-volatile memory. A battery protection IC is optionally embedded in the chip or externally connected with this chip to protect the battery from over-/under-voltage, over-current and short-circuit in both charge and discharge.
3 Citations
10 Claims
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1. A battery management system, comprising:
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a battery management chip, having embedded SRAM module, CPU, ROM therein; an external non-volatile memory module having a battery management program stored therein and said battery management program thereafter being down loaded into said SRAM in terms of a communication protocol while a host being turned ON or reset and restored said battery management program backed into said non-volatile memory module while said host being turned OFF so that said battery management chip can perform battery management. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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Specification