Sign coding and decoding
First Claim
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1. A method for sign coding, comprising:
- determining coefficient bits to be sign coded;
executing one sign coding instruction implemented in a processor to accelerate generation of context and decision values for the selected coefficient bits in a clean up pass and a significance propagation pass by reducing the number of instructions used by the processor to generate the context and decision values, the execution of the one sign coding instruction comprising;
identifying state variables comprising sigma and sign bits, the state variables associated with selected coefficient bits and horizontal and vertical neighboring bits of the selected coefficient bits to be processed;
identifying sign values associated with selected coefficient bits and horizontal and vertical neighboring bits of the selected coefficient bits to be processed;
computing horizontal and vertical values in response to the state variables and sign values identified;
generating context and decision values in response to the coefficient bit values; and
processing the context and decision values by an arithmetic coder to generate compressed data output;
wherein computing horizontal and vertical values in response to the state variables and sign values identified further comprises;
computing the horizontal value in accordance with
H=min[1,max(−
1,Sigma[m,n−
1]*(1−
2*Sign[m,n−
1])+(Sigma[m,n+1]*(1−
2*Sign[m,n+1]))]wherein the current coding position is [m,n] and m=row, n=column, min is the minimum of two numbers (j,k), max is the maximum of two numbers (r,s), *=multiplication.
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Abstract
Embodiments of the invention provide an instruction that computes the horizontal and vertical values (H,V) based upon the predefined equations. Based upon the horizontal and vertical values (H,V) and the current sign bit being processed at [m,n], the output context and decision pair (CX,D) is determined placed into a destination register.
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Citations
14 Claims
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1. A method for sign coding, comprising:
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determining coefficient bits to be sign coded; executing one sign coding instruction implemented in a processor to accelerate generation of context and decision values for the selected coefficient bits in a clean up pass and a significance propagation pass by reducing the number of instructions used by the processor to generate the context and decision values, the execution of the one sign coding instruction comprising; identifying state variables comprising sigma and sign bits, the state variables associated with selected coefficient bits and horizontal and vertical neighboring bits of the selected coefficient bits to be processed; identifying sign values associated with selected coefficient bits and horizontal and vertical neighboring bits of the selected coefficient bits to be processed; computing horizontal and vertical values in response to the state variables and sign values identified; generating context and decision values in response to the coefficient bit values; and processing the context and decision values by an arithmetic coder to generate compressed data output; wherein computing horizontal and vertical values in response to the state variables and sign values identified further comprises; computing the horizontal value in accordance with
H=min[1,max(−
1,Sigma[m,n−
1]*(1−
2*Sign[m,n−
1])+(Sigma[m,n+1]*(1−
2*Sign[m,n+1]))]wherein the current coding position is [m,n] and m=row, n=column, min is the minimum of two numbers (j,k), max is the maximum of two numbers (r,s), *=multiplication. - View Dependent Claims (2, 3, 4, 5)
wherein the current coding position is [m,n] and m=row, n=column, min is the minimum of two numbers (j,k), max is the maximum of two numbers (r,s), *=multiplication.
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3. The method claimed in claim 1, wherein the state variables are significance state variables.
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4. The method claimed in claim 1, wherein the state variables correspond to an array of quantized coefficients being scanned.
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5. The method claimed in claim 1, wherein the instruction is used for JPEG2000.
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6. A system, comprising:
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a memory; a processor to execute one sign coding instruction to accelerate generation of context and decision values for the selected coefficient bits in a clean up pass and a significance propagation pass by reducing the number of instructions used by the processor to generate the context and decision values, the execution of the one sign coding instruction comprising; identifying state variables comprising sigma and sign bits, the state variables associated with selected coefficient bits and horizontal and vertical neighboring bits of the selected coefficient bits to be processed; identifying sign values associated with selected coefficient bits and horizontal and vertical neighboring bits of the selected coefficient bits to be processed; computing horizontal and vertical values in response to the state variables and sign values identified; generating context and decision values in response to the coefficient bit values; and processing the context and decision values by an arithmetic coder to generate compressed data output; wherein computing horizontal and vertical values in response to the state variables and sign values identified further comprises; computing the vertical values in accordance with
V=min[1,max(−
1,Sigma[m−
1,n]*(1−
2*Sign[m−
1,n])+(Sigma[m+1,n]*(1−
2*Sign[m+1,n]))]wherein the current coding position is [m,n] and m=row, n=column, min is the minimum of two numbers (j,k), max is the maximum of two numbers (r,s), *=multiplication. - View Dependent Claims (7, 8, 9, 10)
wherein the current coding position is [m,n] and m=row, n=column, min is the minimum of two numbers (j,k), max is the maximum of two numbers (r,s), *=multiplication.
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8. The system claimed in claim 6, wherein the state variables are significance state variables.
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9. The system claimed in claim 6, wherein the state variables correspond to an array of quantized coefficients being scanned.
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10. The system claimed in claim 6, wherein the instruction is used for JPEG2000.
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11. A non-transitory machine readable storage medium having stored therein a plurality of machine readable instructions executable by a processor to determine sign coding, comprising:
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determining coefficient bits to be sign coded; executing one sign coding instruction implemented in a processor to accelerate generation of context and decision values for the selected coefficient bits in a clean up pass and a significance propagation pass by reducing the number of instructions used by the processor to generate the context and decision values, the execution of the one sign coding instruction comprising; identifying state variables comprising sigma and sign bits, the state variables associated with selected coefficient bits and horizontal and vertical neighboring bits of the selected coefficient bits to be processed; identifying sign values associated with selected coefficient bits and horizontal and vertical neighboring bits of the selected coefficient bits to be processed; computing horizontal and vertical values in response to the state variables and sign values identified; generating context and decision values in response to the coefficient bit values; and processing the context and decision values by an arithmetic coder to generate compressed data output; wherein computing horizontal and vertical values in response to the state variables and sign values identified further comprises; computing the vertical values in accordance with
V=min[1,max(−
1,Sigma[m−
1,n]*(1−
2*Sign[m−
1,n])+(Sigma[m+1,n]*(1−
2*Sign[m+1,n]))]wherein the current coding position is [m,n] and m=row, n=column, min is the minimum of two numbers (j,k), max is the maximum of two numbers (r,s), *=multiplication. - View Dependent Claims (12, 13, 14)
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Specification