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Pipelined packet switching and queuing architecture

  • US 7,792,027 B2
  • Filed: 03/06/2006
  • Issued: 09/07/2010
  • Est. Priority Date: 02/21/2006
  • Status: Active Grant
First Claim
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1. An apparatus comprising:

  • a packet processor, whereinthe packet processor comprises a plurality of processing pipelines each processing pipeline configured to concurrently process data from a plurality of packets; and

    a bridge module, coupled to the packet processor, comprising a plurality of buffers configured to store network packet data, and configured to provide network packet data to the packet processor, andinsert a buffer threshold exceeded indication in the network packet data provided to the packet processor if an amount of network packet data stored in a configured number of buffers exceeds a configured first threshold; and

    whereinthe packet processor is configured to selectively drop the network packet data provided to the packet processor if the network packet data comprises the buffer threshold exceeded indication.

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