Oscillator calibration for motor controller

• US 7,792,652 B1
• Filed: 05/28/2008
• Issued: 09/07/2010
• Est. Priority Date: 05/30/2007
• Status: Expired due to Fees

• Current Assignee: Marvell International Limited (Marvell Technology Group Limited)
• Original Assignee: Marvell International Limited (Marvell Technology Group Limited)
• Inventors: Chui, Siew
• Primary Examiner(s): Nghiem; Michael P
• Assistant Examiner(s): Le; Toan M
• Application Number:
  US12/128,505
• Time in Patent Office: 832 Days
• Field of Search: 702/89, 702/57, 702/79, 702/81, 702/84, 702/85, 702/90, 702/106, 702/107, 702/176, 702/178, 702/182, 702/183, 369/8, 369/19, 369/47.36, 369/60.01, 369/128, 369/129, 73/10.1, 73/14.2, 700/108, 700/109, 331/2, 331/13, 331/18, 331/23, 331/25, 331/34, 331/44, 331 46- 48, 331/55, 331/158, 327141-144
• US Class Current: 702/89
• CPC Class Codes: G11B 5/54 with provision for moving the head into or out of its operative position or across tracks
• CPC Class Codes: G11B 5/59616 Synchronisation; Clocking G11B5/59622 takes precedence

Abstract

Systems, methods, and apparatuses including computer program products for oscillator calibration. In one aspect, a calibration module includes a monitor submodule that evaluates operation of a system to determine if the system is operating in a first mode or a second different mode, where the second clock source is not operating as expected in the second different mode; a calibration engine that determines a calibration value using the first clock source and the second clock source in response to the system operating in the first mode; and a register that stores the calibration value; where the calibration engine calibrates the first clock source using the calibration value and provides to the system the calibrated first clock source as a timing reference instead of the second clock source as the timing reference, in response to the system operating in the second different mode.

Claims

1. A calibration module to calibrate a first clock source according to a second clock source, the calibration module including:

a monitor submodule that evaluates operation of a system to determine if the system is operating in a first mode or a second different mode, wherein the second clock source is not operating as expected in the second different mode;

a calibration engine that determines a calibration value using the first clock source and the second clock source in response to the system operating in the first mode; and

a register that stores the calibration value;

wherein the calibration engine calibrates the first clock source using the calibration value and provides to the system the calibrated first clock source as a timing reference instead of the second clock source as the timing reference, in response to the system operating in the second different mode.

2. The calibration module of claim 1, wherein the first mode is a mode that is in accordance with an operating condition.

3. The calibration module of claim 1, wherein the second clock source is not operating as expected when the second clock source is not powered.

4. A method to calibrate a first clock source according to a second clock source, the method comprising:

evaluating operation of a system to determine if the system is operating in a first mode or a second different mode, wherein the second clock source is not operating as expected in the second different mode;

if the system is operating in the first mode, calibrating a first clock source using a second clock source, including;

determining a calibration value using the first clock source and the second clock source,

storing the calibration value, and

calibrating the first clock source using the calibration value;

providing to the system the second clock source as a timing reference in response to the system operating in the first mode; and

providing to the system the calibrated first clock source as the timing reference instead of the second clock source as the timing reference, in response to the system operating in the second different mode.

5. The method of claim 4, wherein evaluating operation of the system includes:

determining if the system is powered; and

determining if the second clock source is operating.

6. The method of claim 5, further comprising:

if the system or the second clock source is not powered, powering the first clock source using an emergency power supply.

7. The method of claim 4, wherein the first clock source is an internal oscillator and the second clock source is used by a system clock.

8. The method of claim 4, wherein the second clock source is not operating as expected when the second clock source is not powered.

9. A system to calibrate a first clock source according to a second clock source, the system comprising:

means for evaluating operation of a system to determine if the system is operating in a first mode or a second different mode, wherein the second clock source is not operating as expected in the second different mode;

if the system is operating in the first mode, means for calibrating the first clock source using the second clock source, including;

means for determining a calibration value using the first clock source and the second clock source,

means for storing the calibration value, and

means for calibrating the first clock source using the calibration value;

means for providing to the system the second clock source as a timing reference in response to the system operating in the first mode; and

means for providing to the system the calibrated first clock source as the timing reference instead of the second clock source as the timing reference, in response to the system operating in the second different mode.

10. The system of claim 9, wherein means for evaluating operation of the system include:

means for determining if the system is powered; and

means for determining if the second clock source is operating.

11. The system of claim 10, further comprising:

if the system or the second clock source is not powered, powering the first clock source using an emergency power supply.

12. The system of claim 9, wherein the first clock source is an internal oscillator and the second clock source is used by a system clock.

13. The system of claim 9, wherein the second clock source is not operating as expected when the second clock source is not powered.