Controlled reliability in an integrated circuit
First Claim
1. A method for controlling a power supply voltage for a memory array comprising addressable units, the method comprising:
- detecting whether an error occurred in performing a read operation on at least one addressable unit of the memory array using a first power supply voltage coupled to at least one portion of the memory array and to a processor, wherein the first power supply voltage is generated by a core voltage generator;
if an error is detected, then incrementing an error counter for tracking an error count associated with the at least one portion of the memory array;
switching the at least one portion of the memory array to a second power supply voltage if the error count is equal to or exceeds an error threshold for the at least one portion of the memory array;
continuing operation of the memory using the second power voltage independent of the error counter; and
based on at least one condition independent of the error counter, switching the at least one portion of the memory array to the first power supply voltage and resetting the error counter to an initial value.
19 Assignments
0 Petitions
Accused Products
Abstract
Methods and systems for configuring characteristics associated with at least one portion of a memory array comprising addressable units are provided. In one aspect, a method for controlling a power supply voltage for a memory array comprises detecting whether an error occurred in performing a read operation on an addressable unit of the memory array using a first power supply voltage coupled to the memory array. The method further comprises incrementing an error counter for tracking an error count associated with the memory array and switching the memory array to a second power supply voltage if the error count is equal to or exceeds an error threshold for the memory array. The method further comprises, based on at least one condition, switching the memory array to the first power supply voltage and resetting the error counter to an initial value.
53 Citations
20 Claims
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1. A method for controlling a power supply voltage for a memory array comprising addressable units, the method comprising:
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detecting whether an error occurred in performing a read operation on at least one addressable unit of the memory array using a first power supply voltage coupled to at least one portion of the memory array and to a processor, wherein the first power supply voltage is generated by a core voltage generator; if an error is detected, then incrementing an error counter for tracking an error count associated with the at least one portion of the memory array; switching the at least one portion of the memory array to a second power supply voltage if the error count is equal to or exceeds an error threshold for the at least one portion of the memory array; continuing operation of the memory using the second power voltage independent of the error counter; and based on at least one condition independent of the error counter, switching the at least one portion of the memory array to the first power supply voltage and resetting the error counter to an initial value. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method for configuring characteristics associated with at least one portion of a memory array comprising addressable units, the method comprising:
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detecting whether an error occurred in performing a read operation on at least one addressable unit of the memory array, wherein the at least one portion of the memory array is configured to operate based on a first set of characteristics; if an error is detected, then incrementing an error counter for tracking an error count associated with at least one portion of the memory array; if the error count is equal to or exceeds an error threshold for the at least one portion of the memory array, re-configuring the at least one portion of the memory array to operate based on a second set of characteristics, wherein the second set of characteristics differs from the first set of characteristics in terms of a value of at least one of the characteristics; continuing operate the memory array using the second set of characteristics independent of the error counter; and based on at least one condition that is independent of the error counter re-configuring the at least one portion of the memory array to operate based on the first set of characteristics and resetting the error counter to an initial value. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A system for controlling a power supply voltage for a memory array comprising addressable units, the system comprising:
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an error detector/corrector for detecting whether an error occurred in performing a read operation on at least one addressable unit of the memory array using a first power supply voltage coupled to at least one portion of the memory array and using a first timing characteristic for accessing the at least one portion of the memory array; and a memory configuration controller; for incrementing an error counter for tracking an error count associated with at least one portion of the memory array, in case an error is detected by the error detector, for switching the at least one portion of the memory array to a second power supply voltage if the error count is equal to or exceeds an error threshold for the memory array, continuing operation of the memory using the second power voltage independent of the error counter; for switching the at least one portion of the memory array to the first power supply voltage and resetting the error counter to an initial value based on at least one condition that is independent of the error counter, and for changing at least one timing characteristic for accessing the at least one portion of the memory array if the error count is equal to or exceeds the error threshold for the at least one portion of the memory array. - View Dependent Claims (16, 17, 18, 19)
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20. A system for controlling a power supply voltage for a memory array comprising addressable units, the system comprising:
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an error detector/corrector for detecting whether an error occurred in performing a read operation on at least one addressable unit of the memory array using a first power supply voltage coupled to at least one portion of the memory array and using a first timing characteristic for accessing the at least one portion of the memory array; and a memory configuration controller; for incrementing an error counter for tracking an error count associated with at least one portion of the memory array, in case an error is detected by the error detector, for switching the at least one portion of the memory array to a second power supply voltage if the error count is equal to or exceeds an error threshold for the memory array, continuing operation of the memory using the second power voltage independent of the error counter; for switching the at least one portion of the memory array to the first power supply voltage and resetting the error counter to an initial value based on at least one condition that is independent of the error counter, and for changing at least one timing characteristic for accessing the at least one portion of the memory array if the error count is equal to or exceeds the error threshold for the at least one portion of the memory array; wherein the memory configuration controller is further configured to change a refresh rate associated with the at least one portion of the memory array if the error count is equal to or exceeds the error threshold for the at least one portion of the memory array.
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Specification