Signal segmentation method and CRC attachment method for reducing undetected error

• US 7,793,194 B2
• Filed: 09/08/2008
• Issued: 09/07/2010
• Est. Priority Date: 09/08/2007
• Status: Active Grant

• Current Assignee: LG Electronics, Inc. (LG Corporation)
• Original Assignee: LG Electronics, Inc. (LG Corporation)
• Inventors: Kim, Ki Jun, Kim, Bong Hoe, Yun, Young Woo, Seo, Dongyoun, Roh, Dongwook, Lee, Daewon, Yu, Nam Yul
• Primary Examiner(s): CHAUDRY, MUJTABA M
• Application Number:
  US12/206,540
• Publication Number:
  US 20090077446A1
• Time in Patent Office: 729 Days
• Field of Search: 714/776, 714/758
• US Class Current: 714/776
• CPC Class Codes: G06F 11/1004 to protect a block of data words, e.g. CRC or checksum G06F11/1076 takes precedence; security arrangements for protecting computers or computer systems against unauthorized activity G06F21/00
• CPC Class Codes: H03M 13/09 Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
• CPC Class Codes: H03M 13/093 CRC update after modification of the information word
• CPC Class Codes: H04L 1/0041 Arrangements at the transmitter end
• CPC Class Codes: H04L 1/0042 Encoding specially adapted to other signal generation operation, e.g. in order to reduce transmit distortions, jitter, or to improve signal shape H04L1/0067 takes precedence
• CPC Class Codes: H04L 1/0061 Error detection codes
• CPC Class Codes: H04L 1/0078 Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location forward error control, e.g. FEC, CRC H04L1/004; adaptive formatting H04L1/0006; mappings H04L27/00

Abstract

The present invention provides for applying a cyclic redundancy check (CRC) to a data signal. The present invention includes attaching a first CRC to a first data signal block having a first length, segmenting the first data signal block attached with the first CRC into a plurality of second data signal blocks having a length shorter than the first length, respectively generating a second CRC for each second data signal block, and attaching the generated second CRC to the respective second data signal block. Moreover, the first CRC and second CRC may be generated from respectively different CRC generating polynomial equations.

Claims

1. A method for transmitting a signal having a double CRC (cyclic redundancy check) structure using two types of CRCs generated using different reading patterns from each other to a receiver by a transmitter, the method comprising:

(a) attaching a first CRC to a first signal block having a first length;

(b) segmenting the first data signal block attached with the first CRC into “

C”

second signal blocks having a second length when the first length is longer than a predetermined length, wherein “

C”

is an integer number greater than 2;

(c) respectively attaching a second CRC to each of the second signal blocks;

(d) channel coding the second signal blocks attached with the second CRC; and

(e) transmitting the channel coded second signal blocks to the receiver,

wherein the first CRC and second CRC are generated by using different reading patterns of the first signal block and the second signal block, respectively, and

wherein the “

C”

is determined as

C=┌

B/(Z−

L)┐

,

wherein “

B”

indicates a length corresponding to the first length plus the length of the first CRC, “

Z”

indicates a maximum length of the second length, and “

L”

indicates the length of the second CRC.

2. The method of claim 1, wherein the first signal block is a transport block and the second signal block is a code block.

3. The method of claim 1, wherein segmenting the first signal block into the “

C”

second signal blocks is performed after interleaving the first signal block attached with the first CRC using a first type interleaving at step (b).

4. The method of claim 1, wherein the second CRC is generated according to an order of the second signal block after interleaving the second signal block using a second type interleaving at step (c).

5. The method of claim 4, wherein the second CRC is attached to each of the interleaved second signal blocks or to the second signal blocks before the interleaving at step (c).

6. The method of claim 1, wherein the first CRC is generated according to an order of the first signal block after interleaving the first signal block using a third type interleaving at step (a).

7. The method of claim 6, wherein the first CRC is attached to the interleaved first signal block or to the first signal block before the interleaving at step (b).

8. The method of claim 1, wherein at least one of the first CRC and the second CRC is generated by reading a corresponding one of the first signal block and the second signal block in reverse direction.