Integrated microphone

• US 7,795,695 B2
• Filed: 09/27/2006
• Issued: 09/14/2010
• Est. Priority Date: 01/27/2005
• Status: Active Grant

• Current Assignee: Invensense Incorporated (TDK Corporation)
• Original Assignee: Analog Devices, Inc.
• Inventors: Weigold, Jason W., Brosnihan, Timothy J., Martin, John R.
• Primary Examiner(s): COLEMAN, WILLIAM D
• Application Number:
  US11/535,804
• Publication Number:
  US 20070087466A1
• Time in Patent Office: 1,448 Days
• Field of Search: 257/419, 438/53, 181/167, 381/175
• US Class Current: 257/419
• CPC Class Codes: B81B 2201/0257 Microphones or microspeakers
• CPC Class Codes: B81C 1/00246 Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
• CPC Class Codes: B81C 2203/0728 Pre-CMOS, i.e. forming the micromechanical structure before the CMOS circuit
• CPC Class Codes: H04R 1/04 Structural association of microphone with electric circuitry therefor in deaf-aid sets H04R25/00
• CPC Class Codes: H04R 19/005 using semiconductor materials
• CPC Class Codes: H04R 19/04 Microphones H04R19/01 takes precedence
• CPC Class Codes: H04R 31/006 Interconnection of transducer parts of diaphragm and outer suspension by moulding H04R31/003

Abstract

A method of forming a microphone having a variable capacitance first deposits high temperature deposition material on a die. The high temperature material ultimately forms structure that contributes to the variable capacitance. The method then forms circuitry on the die after depositing the deposition material. The circuitry is configured to detect the variable capacitance.

Claims

1. A method of forming a microphone having a variable capacitance, the method comprising:

depositing high temperature deposition material on a die, the high temperature material ultimately forming structure that contributes to the variable capacitance; and

forming circuitry on the die after depositing the deposition material, the circuitry being configured to detect the variable capacitance.

2. The method as defined by claim 1 further comprising forming a released diaphragm on the die after forming circuitry on the die, the released diaphragm being formed by the high temperature deposition material.

3. The method as defined by claim 1 wherein the deposition material is polysilicon.

4. The method as defined by claim 1 further comprising processing the deposition material to form unreleased structure.

5. The method as defined by claim 1 wherein the die is a part of a SOI wafer.

6. The method as defined by claim 1 wherein the microphone is a MEMS microphone.

7. The method as defined by claim 1 further comprising:

adding sacrificial material to the die, the sacrificial material being between the deposition material and the die;

selectively removing at least a portion of the deposition material; and

selectively removing at least a portion of the sacrificial material to suspend the deposition material after forming the circuitry.

8. The method as defined by claim 1 wherein depositing comprises:

determining a temperature at which to deposit the deposition material as a function of the circuitry to be formed on the die.

9. A microphone apparatus comprising:

a SOI wafer;

a microphone formed at least in part by the SOI wafer, the microphone having a diaphragm and backplate that form a variable capacitor; and

circuitry formed on the SOI wafer, the circuitry being configured for detecting the capacitance of the variable capacitor.

10. The microphone as defined by claim 9 wherein the diaphragm is formed from a high temperature deposition material.

11. The microphone as defined by claim 9 wherein the diaphragm is formed from a low temperature deposition material.

12. The microphone as defined by claim 9 wherein the backplate is formed by a portion of the SOI wafer.

13. A method of forming a microphone, the method comprising:

forming, on a die, circuitry for detecting a variable capacitance;

selecting a temperature for depositing a deposition material on the die, the temperature being selected as a function of the circuitry;

selecting the deposition material as a function of the temperature; and

depositing the selected deposition material on the die after forming the circuitry, the deposition material being a low temperature deposition material; and

processing the deposition material to form structure.

14. The method as defined by claim 13 wherein the deposition material is silicon germanium.

15. The method as defined by claim 13 wherein the die is a part of a SOI wafer.

16. The method as defined by claim 13 wherein the die is a silicon wafer that is not part of a SOI wafer.

17. The method as defined by claim 13 wherein the structure includes a diaphragm that forms a part of a variable capacitor, the circuitry being configured for detecting the capacitance of the variable capacitor.

18. The method as defined by claim 13 wherein processing comprises:

adding a sacrificial material between the deposition material and the die; and

selectively removing the sacrificial material to release the structure.

19. The method as defined by claim 13 wherein the circuitry can withstand temperatures up to a given temperature without malfunctioning, the given deposition temperature being less than the given temperature.

20. The apparatus produced by the process of claim 13.