Multilayer wiring board

• US 7,800,002 B2
• Filed: 11/14/2005
• Issued: 09/21/2010
• Est. Priority Date: 11/24/2004
• Status: Active Grant

• Current Assignee: Dai Nippon Printing Company Limited
• Original Assignee: Dai Nippon Printing Company Limited
• Inventors: Chujo, Shigeki, Nakayama, Koichi
• Primary Examiner(s): Patel; Ishwarbhai B
• Application Number:
  US11/791,572
• Publication Number:
  US 20080083558A1
• Time in Patent Office: 1,772 Days
• Field of Search: 174/262, 174/263, 174/264, 174/265, 174/266
• US Class Current: 174/263
• CPC Class Codes: C23C 16/0245 by etching with a plasma
• CPC Class Codes: C23C 16/18 from metallo-organic compounds
• CPC Class Codes: H01L 21/486 Via connections through the substrate with or without pins
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H05K 1/0306 Inorganic insulating substrates, e.g. ceramic, glass
• CPC Class Codes: H05K 2201/09563 Metal filled via plated through-hole filled with insulating material H05K2201/0959
• CPC Class Codes: H05K 2201/096 Vertically aligned vias, holes or stacked vias
• CPC Class Codes: H05K 2203/095 Plasma, e.g. for treating a substrate to improve adhesion with a conductor or for cleaning holes
• CPC Class Codes: H05K 3/0041 by plasma etching
• CPC Class Codes: H05K 3/0079 characterised by the method of application or removal of the mask H05K3/0091 takes precedence
• CPC Class Codes: H05K 3/388 by the use of a metallic or inorganic thin film adhesion layer
• CPC Class Codes: H05K 3/4076 by thin-film techniques
• CPC Class Codes: H05K 3/423 characterised by electroplating method
• CPC Class Codes: H05K 3/445 having insulated holes or insulated via connections through the metal core
• CPC Class Codes: H05K 3/4605 made from inorganic insulating material
• CPC Class Codes: H05K 3/4644 by building the multilayer layer by layer, i.e. build-up multilayer circuits making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602
• CPC Class Codes: H05K 3/4679 Aligning added circuit layers or via connections relative to previous circuit layers
• CPC Class Codes: Y10T 29/49155 : Manufacturing circuit on or in base

Abstract

Disclosed are a multilayer wiring board, which has a high degree of freedom of wiring design and can realize high-density wiring, and a method which can simply manufacture the multilayer wiring board. The multilayer wiring board comprises a core substrate and two or more wiring layers provided on the core substrate through an electrical insulating layer. The core substrate has a plurality of throughholes filled with an electroconductive material, and the front side and back side of the core substrate have been electrically conducted to each other by the electroconductive material. The throughholes have an opening diameter in the range of 10 to 100 μm. An insulation layer and an electroconductive material diffusion barrier layer are also provided, and the electroconductive material is filled into the throughholes through the insulation layer. A first wiring layer provided through an electrical insulating layer on the core substrate is connected to the electroconductive material filled into the throughhole through via.

Claims

1. A multilayer wiring board comprising:

a core substrate; and

two or more wiring layers provided through an electrical insulating layer on the core substrate, characterized in that

the core substrate is a silicon core substrate and has a plurality of through holes filled with an electroconductive material for electrical conduction between the front side and back side of the core substrate, the through holes have an opening diameter in the range of 10 to 100 μ

m, an insulation layer and an electroconductive material diffusion barrier layer preventing the diffusion of the electroconductive material into the core substrate are provided on the inner wall surface of the through holes, the electroconductive material has been filled into the through holes through the insulation layer, a via connected to the electroconductive material is disposed immediately above the through holes and a first wiring layer of the two or more wiring layers is provided on the core substrate through the electrical insulating layer and is connected to the electroconductive material within the through hole through the via, wherein

the insulation layer comprises a first insulation layer and a second insulation layer, and the insulation layer and the electroconductive material diffusion barrier layer are stacked on the inner wall surface within the through holes in the order of the first insulation layer, the electroconductive material diffusion barrier layer, and the second insulation layer, wherein

the first insulation layer and the second insulation are formed of an identical material.

2. The multilayer wiring board according to claim 1, characterized in that the electroconductive material diffusion barrier layer is a thin film of titanium nitride.

3. The multilayer wiring board according to claim 1, characterized in that the insulation layer is a thin film of silicon dioxide.

4. The multilayer wiring board according to claim 1, characterized in that the insulation layer and the electroconductive material diffusion barrier layer are stacked on the inner wall surface within the throughholes in the order of the electroconductive material diffusion barrier layer and the insulation layer.

5. The multilayer wiring board according to claim 1, characterized in that the insulation layer further comprises a third insulation layer in addition to the first and second insulation layers, the insulation layer and the electroconductive material diffusion barrier layer are stacked on the inner wall surface within the throughholes in the order of the first insulation layer, the second insulation layer, the electroconductive material diffusion barrier layer, and the third insulation layer, and the second insulation layer and third insulation layer have an identical chemical composition.

6. The multilayer wiring board according to claim 1, characterized in that the electroconductive material is copper provided within the throughholes by electroplating.

7. The multilayer wiring board according to claim 1, characterized in that the electroconductive material is an electroconductive paste filled into the throughholes.

8. The multilayer wiring board according to claim 1, characterized in that the opening diameter of the throughholes is in the range of 10 to 70 μ

m.

9. The multilayer wiring board according to claim 1, characterized in that the thickness of the core substrate is in the range of 50 to 725 μ

m.