Multi-pair gigabit Ethernet transceiver
First Claim
1. An integrated circuit communication device comprising:
- an intersymbol interference (ISI) compensation filter having a substantially inverse impulse response to the impulse response of a pulse shaping filter of a remote transmitter, wherein the ISI compensation filter comprises;
an inverse partial response filter having an impulse response substantially an inverse of the impulse response of the pulse shaping filter of the remote transmitter, so as to substantially compensate an input digital signal for an ISI component introduced by the pulse shaping filter of the remote transmitter, wherein the inverse partial response filter is implemented with a characteristic feedback gain factor K, and wherein the inverse partial response filter operates in accordance with a non-zero value of the characteristic feedback gain factor K during communication initialization and wherein the value of the feedback gain factor K is ramped down to zero after a pre-defined interval.
2 Assignments
0 Petitions
Accused Products
Abstract
Various systems and methods providing high speed decoding, enhanced power reduction and clock domain partitioning for a multi-pair gigabit Ethernet transceiver are disclosed. ISI compensation is partitioned into two stages; a first stage compensates ISI components induced by characteristics of a transmitter'"'"'s partial response pulse shaping filter in a demodulator, a second stage compensates ISI components induced by characteristics of a multi-pair transmission channel in a Viterbi decoder. High speed decoding is accomplished by reducing the DFE depth by providing an input signal from a multiple decision feedback equalizer to the Viterbi based on a tail value and a subset of coefficient values received from a unit depth decision-feedback equalizer. Power reduction is accomplished by adaptively truncating active taps in the NEXT, FEXT and echo cancellation filters, or by disabling decoder circuitry portions, as channel response characteristics allow. A receive clock signal is generated such that it is synchronous in frequency with analog sampling clock signals and has a particular phase offset with respect to one of the sampling clock signals. This phase offset is adjusted such that system performance degradation due to coupling of switching noise from the digital sections to the analog sections is substantially minimized.
-
Citations
10 Claims
-
1. An integrated circuit communication device comprising:
an intersymbol interference (ISI) compensation filter having a substantially inverse impulse response to the impulse response of a pulse shaping filter of a remote transmitter, wherein the ISI compensation filter comprises; an inverse partial response filter having an impulse response substantially an inverse of the impulse response of the pulse shaping filter of the remote transmitter, so as to substantially compensate an input digital signal for an ISI component introduced by the pulse shaping filter of the remote transmitter, wherein the inverse partial response filter is implemented with a characteristic feedback gain factor K, and wherein the inverse partial response filter operates in accordance with a non-zero value of the characteristic feedback gain factor K during communication initialization and wherein the value of the feedback gain factor K is ramped down to zero after a pre-defined interval. - View Dependent Claims (2, 3, 4, 5)
-
6. A method of processing a communication signal received at an integrated circuit communication device, the method comprising:
-
compensating intersymbol interference (ISI) introduced by a pulse shaping filter of a remote transmitter using an inverse response filter having a substantially inverse impulse response to the impulse response of the pulse shaping filter of the remote transmitter, wherein the inverse impulse response filter is implemented with a characteristic feedback gain factor K; and operating the inverse response filter in accordance with a non-zero value of the characteristic feedback gain factor K during communication initialization and further comprising ramping the value of the feedback gain factor K down to zero after a pre-defined interval. - View Dependent Claims (7, 8, 9, 10)
-
Specification