Enhanced diagnostic fault detection and isolation

• US 7,801,702 B2
• Filed: 11/30/2004
• Issued: 09/21/2010
• Est. Priority Date: 02/12/2004
• Status: Active Grant

• Current Assignee: Lockheed Martin Corporation (Martin Marietta Corporation)
• Original Assignee: Lockheed Martin Corporation (Martin Marietta Corporation)
• Inventors: Bestle, Edward R., Berbaum, Richard D.
• Primary Examiner(s): Wachsman; Hal D
• Assistant Examiner(s): HENSON, MISCHITA L
• Application Number:
  US10/998,831
• Publication Number:
  US 20050223290A1
• Time in Patent Office: 2,121 Days
• Field of Search: 702/113, 702/182, 702/183, 702/185, 702/188, 702/57, 702/58, 702/59, 702/75, 702/76, 702/77, 702/117, 702/124, 702/125, 701/29, 701/31, 701/33, 701/34
• US Class Current: 702/185
• CPC Class Codes: G06F 11/27 Built-in tests

Abstract

A system and method for enhanced diagnostic fault detection and isolation is provided, wherein COTS/MOTS subsystems of a system under test are evaluated in a hierarchical manner providing improved test coverage and a reduction in ambiguity group size. The enhanced diagnostic fault detection and isolation method may proceed from automatic built-in-test to initiated built-in-test and finally to manual tests. At each stage of the testing, results may be evaluated to determine which, if any, components need replacing. The diagnostic system may report the results of testing in a fault log and/or a look-up table structure. The systems and methods of the present invention are suited to testing systems that incorporate COTS or MOTS subsystem components, and for use with an interactive electronic technical manual (IETM). Further, the diagnostic system is adaptable to a variety of subsystem interface protocols.

Claims

1. A fault detection and isolation apparatus for detecting and isolating faults in a helicopter comprising:

an interface coupled to at least one helicopter subsystem and a processor, wherein said interface is a stand-alone module and comprises means for transferring data between the helicopter subsystem and the processor, and wherein the interface comprises a character conversion module comprising means for converting characters transferred between the helicopter subsystem and the processor, a data conversion module comprising means for converting data transferred between the helicopter subsystem and the processor and a format conversion module comprising means for converting a format of data transferred between the helicopter subsystem and the processor;

wherein the processor includes a memory having software instructions embodied thereon for a test program sequence adapted to cause the processor to perform the steps of;

identifying at least one subsystem of the apparatus for testing;

generating a test sequence defining an order of testing of the at least one subsystem identified for testing and an order of individual tests to be performed on each subsystem identified for testing;

skipping subsystem tests from a previous test program sequence that have been successfully completed within a predetermined period of time prior to beginning another test program sequence, wherein skipping is performed when a variable is a first state;

generating periodic built-in-test commands;

generating interface test commands;

generating initiated built-in-test commands;

generating manual test prompts

receiving test result data from a periodic built-in-test, an interface test, an initiated built-in-test and a manual test;

processing the test result data, wherein processing test result data comprises conversion of built-in-test codes from numeric values into text messages;

detecting and isolating any faults to one or more candidate components associated with the detected faults; and

storing a result of the detecting and isolating in a database,

wherein the processor detects and isolates faults in the helicopter.

2. The fault detection and isolation apparatus of claim 1, further comprising organizing the database by one of the following group:

error code, time of occurrence, and subsystem reporting a fault.

3. The fault detection and isolation apparatus of claim 1, further comprising a display element coupled to the processor and configured to display faults and maintenance procedures responsive to the test program sequence.

4. The fault detection and isolation apparatus of claim 1, wherein the interface is at least partially housed within the subsystem.

5. The fault detection and isolation apparatus of claim 1, wherein the interface is at least partially housed within the processor.

6. The fault detection and isolation apparatus of claim 1, wherein the interface is coupled to the processor and subsystem via a wireless coupling.

7. The fault detection and isolation apparatus of claim 1, wherein the processor and the display element are part of an integrated electronic technical manual.

8. The fault detection and isolation apparatus of claim 1, wherein the test program sequence is written in a mark-up language.

9. A diagnostic method for detecting and isolating faults in a complex system comprising:

identifying at least one subsystem of the complex system for testing;

generating a test sequence defining an order of testing of the at least one subsystem identified for testing and an order of individual tests to be performed on each subsystem identified for testing; and

performing a subsystem fault detection and isolation test for each subsystem of the complex system identified for testing using a stand-alone interface module, wherein the subsystem fault detection and isolation test comprises;

checking prerequisite conditions;

requesting periodic built-in-test results if available, if periodic built-in-test results are not available, then requesting periodic built-in-test be performed and requesting the results of the periodic built-in-test;

receiving periodic built-in-test result data;

testing interfaces;

requesting execution of initiated built-in-test;

requesting the results of the initiated built-in-test once it has completed;

receiving initiated built-in-test result data;

indicating any detected faults and isolating and indicating one or more components that are associated with the detected faults; and

displaying a report indicating faults detected and components isolated for corrective action according to test results, wherein the report comprises a fault log listing a fault code, a time the fault code occurred, and a subsystem or assembly where the fault occurred for each fault, and wherein the report is generated in response to at least one result code from one of the following group;

a prerequisite test, a periodic built-in-test, a interface test, an initiated built-in-test and a manual test, in combination with a variable indicating the scope of the test that is being performed.

10. The fault detection and isolation method of claim 9, further comprising:

performing a manual test;

receiving results of the manual test; and

incorporating the manual test results in the detecting and isolating of faults.

11. The fault detection and isolation method of claim 10, wherein the manual test comprises:

presenting a user with an explanation of the manual test to be performed;

waiting for the user to perform the manual test;

receiving input from the user indicating results of the manual test;

checking the manual test results in order to determine if there were any faults; and

isolating any faults to one or more candidate components associated with the faults.

12. The fault detection and isolation method of claim 9, wherein the step of generating a test sequence defining an order of testing of the subsystems identified for testing and an order of individual tests to be performed on each subsystem identified for testing, is based on the physical hierarchy of the subsystems of the complex system.

13. The fault detection and isolation method of claim 12, further comprising the step of skipping subsystem tests from a previous test program sequence that have been successfully completed within a predetermined period of time prior to beginning another test program sequence, wherein said skipping is performed when a variable is a first state.

14. The fault detection and isolation method of claim 9, wherein the periodic built-in-test comprises:

performing mode tests;

performing data input and output tests;

evaluating detailed built-in-test results in order to determine if faults occurred; and

isolating faults to one or more candidate components associated with the detected faults.

15. The fault detection and isolation method of claim 9, wherein the interface test comprises:

requesting message data;

receiving message data

checking message status;

checking the message status and data in order to determine if faults occurred; and

isolating faults to one or more candidate components associated with the detected faults.

16. The fault detection and isolation method of claim 9, wherein the initiated built-in-test comprises:

prompting a user prior to starting a lengthy test, wherein a lengthy test is one that will exceed a predetermined time to complete, if a test is lengthy;

requesting execution of an initiated built-in-test;

receiving the results of the initiated built-in-test; and

checking initiated built-in-test results in order to determine if there were any faults; and

isolating any detected faults to one or more candidate components associated with the detected faults.

17. The fault detection and isolation method of claim 9, wherein the complex system is an aircraft.

18. The fault detection and isolation method of claim 9, wherein the complex system is a helicopter.

19. A fault detection and isolation apparatus for detecting and isolating faults in a complex system comprising:

an interface coupled to at least one subsystem of the complex system and a processor, wherein said interface is a stand-alone module and comprises means for transferring data between the subsystem and the processor, and wherein the interface further comprises a character conversion module comprising means for converting characters transferred between the subsystem and the processor, a data conversion module comprising means for converting data transferred between the subsystem and the processor and a format conversion module comprising means for converting a format of data transferred between the subsystem and the processor;

wherein the processor includes a memory having software instructions embodied thereon for a test program sequence that cause the processor to perform the steps of;

identifying at least one subsystem of the complex apparatus for testing;

generating a test sequence defining an order of testing of the at least one subsystem identified for testing and an order of individual tests to be performed on each subsystem identified for testing;

skipping subsystem tests from a previous test program sequence that have been successfully completed within a predetermined period of time prior to beginning another test program sequence, wherein skipping is performed when a variable is a first state;

generating periodic built-in-test commands;

generating interface test commands;

generating initiated built-in-test commands;

generating manual test prompts;

receiving test result data from the periodic built-in-test, the interface test, the initiated built-in-test and the manual test;

processing the test result data;

detecting and isolating any faults to one or more candidate components associated with the detected faults; and

storing the test result data in a database, wherein the database may be organized by one of the following group;

error code, time of occurrence, and subsystem reporting a fault;

wherein the processor detects and isolates faults in the complex apparatus.

20. The fault detection and isolation apparatus of claim 19, further comprising a display element coupled to the processor and configured to display faults and maintenance procedures responsive to the test program sequence.

21. The fault detection and isolation apparatus of claim 19, wherein the interface is at least partially housed within the subsystem.

22. The fault detection and isolation apparatus of claim 19, wherein the interface is at least partially housed within the processing element.

23. The fault detection and isolation apparatus of claim 19, wherein the interface is coupled to the processor and subsystem via a wireless coupling.

24. The fault detection and isolation apparatus of claim 19, wherein the processor and the display element are part of an integrated electronic technical manual.

25. The fault detection and isolation apparatus of claim 19, wherein the fault detection and isolation apparatus is adapted to detect and isolate faults within a helicopter.

26. The fault detection and isolation apparatus of claim 19, wherein the test program sequence is written in a mark-up language.