Timed loop with sequence frames structure for a graphical program

• US 7,802,229 B2
• Filed: 08/15/2005
• Issued: 09/21/2010
• Est. Priority Date: 07/16/2004
• Status: Active Grant

• Current Assignee: National Instruments Corporation (Emerson Electric Company)
• Original Assignee: National Instruments Corporation (Emerson Electric Company)
• Inventors: Curtis, Matthew, Vrancic, Aljosa, Kornerup, Jacob, Rogers, Steve, Shah, Biren
• Primary Examiner(s): Dam; Tuan Q
• Assistant Examiner(s): Smith; Cheneca
• Application Number:
  US11/204,369
• Publication Number:
  US 20060053409A1
• Time in Patent Office: 1,863 Days
• Field of Search: None
• US Class Current: 717/109
• CPC Class Codes: G06F 11/323 Visualisation of programs or trace data
• CPC Class Codes: G06F 8/34 Graphical or visual programming
• CPC Class Codes: G06F 9/44 Arrangements for executing specific programs
• CPC Class Codes: G06F 9/4881 Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues

Abstract

A “timed loop with frames” node may be included in a graphical program. The “timed loop with frames” node may combine a timed loop with a timed sequence such that the timed sequence is executed at each iteration of the timed loop. The “timed loop with frames” node may be configured with first execution timing information that controls execution timing for the iterations of the loop. A plurality of graphical code portions may be included in the “timed loop with frames” such that a sequential order of execution for the graphical code portions is specified. The “timed loop with frames” node may be configured with second execution timing information that controls execution timing for the graphical code portions executed at each iteration.

Claims

1. A computer accessible memory medium comprising program instructions for creating a graphical program, wherein the program instructions are executable to:

include a loop structure in the graphical program, wherein the graphical program comprises a plurality of interconnected nodes that visually indicate functionality of the graphical program;

configure the loop structure with first execution timing information, wherein the first execution timing information specifies timing of iterations of the loop structure;

include a plurality of graphical code portions in the graphical program such that the graphical code portions are associated with the loop structure;

configure a sequential order of execution for the graphical code portions; and

configure second execution timing information for one or more of the graphical code portions, wherein the second execution timing information comprises at least one time value that controls execution of at least one of the one or more graphical code portions;

wherein during execution of the graphical program, the loop structure is operable to execute the graphical code portions for a plurality of iterations, wherein each iteration is executed in accordance with the first execution timing information;

wherein executing the graphical code portions in each iteration of the loop structure comprises executing the graphical code portions in the sequential order and in accordance with the second execution timing information.

2. The computer accessible memory medium of claim 1,

wherein said including the loop structure in the graphical program comprises including a first node in the graphical program;

wherein said including the plurality of graphical code portions in the graphical program such that the graphical code portions are associated with the loop structure comprises including the plurality of graphical code portions in the graphical program such that the graphical code portions are associated with the first node;

wherein the first node has an iconic appearance that visually indicates that the graphical code portions associated with the first node are executed for a plurality of iterations during execution of the graphical program.

3. The computer accessible memory medium of claim 2,

wherein the iconic appearance of the first node further visually indicates that each iteration is executed in accordance with the first execution timing information configured for the loop structure.

4. The computer accessible memory medium of claim 2,

wherein the first node is operable to display in the graphical program at least a portion of the first execution timing information configured for the loop structure.

5. The computer accessible memory medium of claim 2,

wherein the iconic appearance of the first node further visually indicates that in each iteration, the graphical code portions are sequentially executed in the sequential order.

6. The computer accessible memory medium of claim 5,

wherein the iconic appearance of the first node further visually indicates that in each iteration, the graphical code portions are sequentially executed in accordance with the second execution timing information configured for the one or more graphical code portions.

7. The computer accessible memory medium of claim 5,

wherein the first node is operable to display in the graphical program at least a portion of the second execution timing information configured for the one or more graphical code portions.

8. The computer accessible memory medium of claim 2,

wherein the first node has an interior portion;

wherein said including the plurality of graphical code portions in the graphical program such that the graphical code portions are associated with the first node comprises positioning the graphical code portions within the interior portion of the first node.

9. The computer accessible memory medium of claim 2,

wherein the first node has a plurality of frames for receiving respective graphical code portions;

wherein said including the graphical code portions in the graphical program such that the graphical code portions are associated with the first node comprises associating each of the graphical code portions with one of the frames of the first node, wherein the frames define the sequential order of execution for the respective graphical code portions.

10. The computer accessible memory medium of claim 9,

wherein each of the frames of the first node has an interior portion;

wherein said associating each graphical code portion with one of the frames of the first node comprises positioning the graphical code portion within the interior portion of the frame.

11. The computer accessible memory medium of claim 10,

wherein the plurality of frames are displayed in the graphical program such that each frame is visible at the same time;

wherein the frames visually indicate that the graphical code portions within the frames are executed in the sequential order defined by the frames.

12. The computer accessible memory medium of claim 1, wherein the program instructions are further executable to:

execute the graphical program, wherein said executing the graphical program comprises executing the graphical code portions for a plurality of iterations, wherein each iteration is executed in accordance with the first execution timing information;

wherein executing the graphical code portions in each iteration comprises executing the graphical code portions in the sequential order and in accordance with the second execution timing information.

13. The computer accessible memory medium of claim 1,

wherein each of the plurality of graphical code portions comprises a plurality of interconnected nodes that visually indicate functionality of the graphical code portion.

14. The computer accessible memory medium of claim 1,

wherein said configuring the loop structure with the first execution timing information includes configuring the loop structure with a first execution period;

wherein said loop structure executing the graphical code portions for the plurality of iterations comprises the loop structure performing the plurality of iterations according to the first execution period.

15. The computer accessible memory medium of claim 14,

wherein said loop structure performing the plurality of iterations according to the first execution period comprises the loop structure causing successive iterations to begin execution at times separated by the first execution period.

16. The computer accessible memory medium of claim 14,

wherein said configuring the loop structure with the first execution period comprises connecting one or more wires to one or more terminals in the graphical program associated with the loop structure, wherein the one or more wires specify the first execution period.

17. The computer accessible memory medium of claim 14,

wherein said configuring the loop structure with the first execution timing information also includes configuring the loop structure with a first timing source, wherein the first execution period is based on the first timing source.

18. The computer accessible memory medium of claim 1,

wherein said configuring the loop structure with the first execution timing information includes configuring the loop structure with a first priority;

wherein said loop structure executing the graphical code portions for the plurality of iterations comprises the loop structure performing the plurality of iterations according to the first priority.

19. The computer accessible memory medium of claim 1,

wherein said configuring the loop structure with the first execution timing information includes configuring the loop structure with a first offset, wherein the first offset specifies a length of time for the loop structure to wait before beginning to perform said executing the graphical code portions for the plurality of iterations.

20. The computer accessible memory medium of claim 1, wherein the program instructions are further executable to:

configure the graphical program to dynamically re-configure the loop structure with new first execution timing information during execution of the graphical program.

21. The computer accessible memory medium of claim 20,

wherein said dynamically re-configuring the loop structure with the new first execution timing information comprises one or more of:

changing an execution period of the loop structure;

changing a priority of the loop structure; and

/or

changing an offset of the loop structure.

22. The computer accessible memory medium of claim 1,

wherein said configuring second execution timing information for one or more of the graphical code portions comprises configuring second execution timing information for a first graphical code portion;

wherein said configuring second execution timing information for the first graphical code portion comprises configuring a first deadline for the first graphical code portion;

wherein the first deadline for the first graphical code portion specifies a time by which execution of the first graphical code portion must complete.

23. The computer accessible memory medium of claim 22,

wherein the specified time by which execution of the first graphical code portion must complete is relative to a time when the first graphical code portion begins execution.

24. The computer accessible memory medium of claim 1,

wherein said configuring second execution timing information for one or more of the graphical code portions comprises configuring second execution timing information for a first graphical code portion;

wherein said configuring second execution timing information for the first graphical code portion comprises configuring an offset for the first graphical code portion;

wherein the offset for the first graphical code portion specifies a length of time to wait before the first graphical code portion begins executing.

25. The computer accessible memory medium of claim 1,

wherein said configuring second execution timing information for one or more of the graphical code portions comprises configuring a timing source to control execution timing for the one or more graphical code portions.

26. The computer accessible memory medium of claim 1,

wherein said configuring second execution timing information for one or more of the graphical code portions comprises configuring second execution timing information for a first graphical code portion;

wherein said configuring second execution timing information for the first graphical code portion comprises configuring a first priority for the first graphical code portion;

wherein during execution of the graphical program, the first graphical code portion is executed according to the first priority.

27. The computer accessible memory medium of claim 26,

wherein said configuring second execution timing information for one or more of the graphical code portions further comprises configuring second execution timing information for a second graphical code portion;

wherein said configuring second execution timing information for the second graphical code portion comprises configuring a second priority for the second graphical code portion;

wherein during execution of the graphical program, the first graphical code portion is executed according to the first priority and the second graphical code portion is executed according to the second priority.

28. The computer accessible memory medium of claim 1,

wherein said configuring second execution timing information for one or more of the graphical code portions comprises configuring second execution timing information for a first graphical code portion;

wherein said configuring second execution timing information for the first graphical code portion comprises configuring a timeout for the first graphical code portion;

wherein the timeout for the first graphical code portion specifies a maximum length of time the first graphical code portion can wait before beginning to execute.

29. The computer accessible memory medium of claim 1,

wherein said configuring the sequential order of execution includes configuring a first graphical code portion to execute before a second graphical code portion;

wherein said configuring the second execution timing information comprises configuring execution timing information for the second graphical code portion based on one or more execution time values for the first graphical code portion.

30. The computer accessible memory medium of claim 29,

wherein during each iteration of the loop structure, the first graphical code portion is executed before the second graphical code portion, wherein execution of the first graphical code portion produces the one or more execution time values for the first graphical code portion;

wherein execution of the second graphical code portion is timed based on the one or more execution time values for the first graphical code portion.

31. The computer accessible memory medium of claim 1,

wherein said configuring the loop structure with the first execution timing information includes configuring the loop structure with a first timing source, wherein the first timing source is used to control timing of execution of the plurality of iterations;

wherein said configuring the second execution timing information for the one or more graphical code portions comprises configuring a second timing source to control timing of execution of the one or more graphical code portions.

32. The computer accessible memory medium of claim 1, wherein the at least one time value of the second execution timing information specifies one or more of:

a time when a graphical code portion should begin execution;

a deadline that specifies a time by which execution of the graphical code portion must complete;

an offset that specifies a length of time to wait before the graphical code portion begins executing;

or

a timeout that specifies a maximum length of time the graphical code portion can wait before beginning to execute.

33. A computer accessible memory medium comprising program instructions for creating a graphical program, wherein the program instructions are executable to:

display a first node in the graphical program, wherein the first node has an iconic appearance including;

a border visually indicating iteration;

two or more frames for receiving different respective graphical code portions, wherein the frames visually indicate a sequential order of execution for the graphical code portions; and

associate a respective graphical code portion with each frame of the first node, wherein the frames define a sequential order of execution for the graphical code portions; and

configure the first node with first execution timing information and second execution timing information, wherein the first execution timing information specifies timing of iterations of the first node, and wherein the second execution timing information comprises at least one time value that controls execution of at least one of the graphical code portions;

wherein during execution of the graphical program, the first node is operable to sequentially execute the graphical code portions in the sequential order for a plurality of iterations, wherein each iteration is timed in accordance with the first execution timing information, and wherein in each iteration, the graphical code portions are sequentially executed in accordance with the second execution timing information.

34. A computer accessible memory medium configured with program instructions executable by a processor to implement:

a node for use in a graphical program, the node comprising;

an icon that is displayed on a display of a computer system, the icon comprising;

a border visually indicating iteration;

two or more frames for receiving different respective graphical code portions, wherein the frames visually indicate a sequential order of execution for the graphical code portions;

wherein the node further comprises program instructions operable to execute the graphical code portions for a plurality of iterations, wherein each iteration is executed in accordance with first execution timing information, wherein the first execution timing information specifies timing of iterations of the first node, and wherein the second execution timing information comprises at least one time value that controls execution of at least one of the graphical code portions;

wherein executing the graphical code portions in each iteration of the loop structure comprises sequentially executing the graphical code portions in the sequential order and in accordance with second execution timing information.