History-independent noise-immune modulated transformer-coupled gate control signaling method and apparatus

• US 7,804,697 B2
• Filed: 06/30/2008
• Issued: 09/28/2010
• Est. Priority Date: 12/11/2007
• Status: Active Grant

• Current Assignee: Cirrus Logic Incorporated
• Original Assignee: Cirrus Logic Incorporated
• Inventors: Melanson, John L.
• Primary Examiner(s): Vu; Bao Q
• Application Number:
  US12/164,217
• Publication Number:
  US 20090147545A1
• Time in Patent Office: 820 Days
• Field of Search: 363/34, 363/20, 363/15, 363/16, 363/21.01, 363/95, 363/97
• US Class Current: 363/34
• CPC Class Codes: H03K 17/08128 in composite switches
• CPC Class Codes: H03K 17/691 using transformer coupling

Abstract

A history-independent and noise-immune modulated transformer-coupled gate control signaling method and apparatus provides robust design characteristics in switching power circuits having a transformer-coupled gate drive. A modulated control signal at a rate substantially higher than the switching circuit gate control rate is provided from the controller circuit to a demodulator via transformer coupling. Codes specified by relative timing of transitions in multiple periods of the modulated control are assigned to gate-on and gate-off timing events that control the switching transistor gate(s) and unassigned patterns are decoded as gate-off events, reducing the possibility that a switching transistor will be erroneously activated due to noise. The modulated signal is constructed so that signal history is not required for decoding, eliminating any requirement of a reference clock. Blanking may be employed to conserve power between codes and to avoid mis-triggering due to noise events during power switching.

Claims

1. A circuit, comprising:

a switching power stage for producing a switched power output at a switching rate and having at least one power switching transistor;

a switching control circuit for determining a turn-on time and a turn-off time of the at least one power switching transistor at the switching rate, and having an output for providing a modulated control signal having a modulated rate that is greater than the switching rate, wherein the modulated control signal encodes events according to codes specified by relative timing of transitions of the modulated control signal in multiple periods of the modulated control signal, the events including a turn-on event corresponding to the turn-on time of the at least one power switching transistor;

a transformer for coupling the output of the switching control circuit to the at least one power switching transistor, whereby the at least one power switching transistor has a gate that is DC isolated from the switching control circuit, wherein a first winding of the transformer is connected to the switching control circuit; and

a demodulator circuit connected to at least one second winding of the transformer and having an output coupled to the gate of the at least one power switching transistor, wherein the output of the demodulator is a gate control signal generated at the switching rate from a control signal received from the at least one second winding at the modulated rate, and wherein the demodulator asserts the gate control signal upon detection of the turn-on event and de-asserts the gate control signal upon detection of another code.

2. The circuit of claim 1, wherein the modulated control signal encodes a binary stream and wherein the codes are specified by patterns of the binary stream.

3. The circuit of claim 2, wherein a particular state of the binary stream is indicated by at least two transitions of the modulated control signal within a half-period of the modulated rate.

4. The circuit of claim 2, wherein the turn-on event is encoded by an alternating pattern of zero and one values of the binary stream.

5. The circuit of claim 4, wherein the another code includes a turn-off code specifying a turn-off event, wherein the demodulator de-asserts the gate control signal upon detection of the turn-off code, wherein the turn-on event is encoded by an alternating pattern of zero and one values and the turn-off event is encoded by two or more adjacent zero or one values.

6. The circuit of claim 1, wherein the another code includes a turn-off code specifying a turn-off event, and wherein the demodulator de-asserts the gate control signal upon detection of the turn-off code.

7. The circuit of claim 6, wherein the switching control circuit does not generate transitions of the modulated control signal in blanking periods extending after codes corresponding to the turn-on event and the turn-off event.

8. The circuit of claim 1, wherein the switching control circuit de-asserts the gate control signal upon detection of an unassigned or unrecognizable code.

9. The circuit of claim 1, wherein the demodulator circuit does not change the gate control signal during blanking periods extending after detection of turn-on events.

10. The circuit of claim 1, wherein the switching control circuit does not generate transitions of the modulated control signal for a blanking period extending after codes corresponding to the turn-on event.

11. The circuit of claim 1, wherein the events include a blanking event, wherein the demodulator circuit does not change the gate control signal during blanking periods extending after detection of a code corresponding to the blanking event.

12. A circuit, comprising:

a switching power stage for producing a switched power output at a switching rate and having at least one power switching transistor;

a switching control circuit for determining a turn-on time and a turn-off time of the at least one power switching transistor at the switching rate, and having an output for providing a modulated control signal having a modulated rate that is greater than the switching rate, and wherein the switching control circuit encodes one or more event types according to relative timing between transitions of the modulated control signal, the event types including a turn-on event that indicates the turn-on time of the at least one power switching transistor, and wherein the switching control circuit stops the transitions of the modulated control signal to conserve power between events;

a transformer for coupling the output of the switching control circuit to the at least one power switching transistor, whereby the at least one transistor has a gate that is DC isolated from the switching control circuit, wherein a first winding of the transformer is connected to the switching control circuit; and

a demodulator circuit connected to at least one second winding of the transformer and having an output coupled to the gate of the at least one power switching transistor, wherein the output of the demodulator is a gate control signal generated at the switching rate from a control signal received from the at least one second winding at the modulated rate, and wherein the demodulator asserts the gate control signal upon detection of the turn-on event within the modulated control signal.

13. A method for controlling a switching power stage, comprising:

generating a modulated control signal for controlling a turn-on time and a turn-off time of at least one power switching transistor of the switching power stage at a switching rate of the switching power stage, wherein the modulated control signal is generated at a modulated rate greater than the switching rate of the switching power stage, rate, wherein the modulated control signal encodes events according to codes specified by relative timing of transitions of the modulated control signal in multiple periods of the modulated control signal, the events including a turn-on event corresponding to the turn-on time of the at least one power switching transistor;

transformer isolating the modulated control signal to provide a DC isolated control signal to at least one power switching transistor of the switching power stage;

demodulating the DC isolated control signal from the modulated rate to control the at least one power switching transistor at the switching rate; and

controlling a gate of the at least one power switching transistor in conformity with a result of the demodulating, wherein the at least one power switching transistor is turned on upon detection of the turn-on event, and wherein the at least one power switching transistor is turned off upon detection of another code.

14. The method of claim 13, wherein the modulated control signal encodes a binary stream and wherein the codes are specified by patterns of the binary stream.

15. The method of claim 14, wherein a particular state of the binary stream is indicated by at least two transitions of the modulated control signal within a half-period of the modulated rate.

16. The method of claim 13, wherein the turn-on event is encoded by an alternating pattern of zero and one values of the binary stream.

17. The method of claim 16, wherein the another code includes a turn-off code specifying a turn-off event, wherein the controlling de-asserts the gate control signal upon detection of the turn-off code by the demodulating, wherein the turn-on event is encoded by an alternating pattern of zero and one values and the turn-off event is encoded by two or more adjacent zero or one values.

20. The method of claim 13, wherein the controlling de-asserts the gate control signal upon detection of an unassigned or unrecognizable code by the demodulating.

21. The method of claim 13, wherein the controlling does not change the gate control signal during blanking periods extending after detection of turn-on events by the demodulating.

22. The method of claim 13, wherein the generating does not generate transitions of the modulated control signal for a blanking period extending after codes corresponding to the turn-on event.

23. The method of claim 13, wherein the events include a blanking event, wherein the controlling does not change the gate control signal during blanking periods extending after detection of a code corresponding to the blanking event by the demodulating.

18. The method of 13, wherein the another code includes a turn-off code specifying a turn-off event, and wherein the controlling de-asserts the gate control signal upon detection of the turn-off code by the demodulating.

19. The method of claim 18, wherein the generating does not generate transitions of the modulated control signal in blanking periods extending after codes corresponding to the turn-on event and the turn-off event.

24. A method for controlling a switching power stage, comprising:

generating a modulated control signal for controlling a turn-on time and a turn-off time of a transistor of the switching power stage at a switching rate of the switching power stage, wherein the modulated control signal is generated at a modulated rate greater than the switching rate of the switching power stage, wherein the generating encodes one or more event types specified by relative timing between transitions of the modulated control signal, the event types including a turn-on event that indicates the turn-on time of the transistor, and wherein the generating stops generating the transitions of the modulated control signal to conserve power between events;

transformer isolating the modulated control signal to provide a DC isolated control signal to at least one power switching transistor of the switching power stage;

demodulating the DC isolated control signal from the modulated rate to control the at least one power switching transistor at the switching rate; and

controlling a gate of the at least one power switching transistor in conformity with a result of the demodulating, wherein the demodulator asserts the gate control signal upon detection of the turn-on event within the modulated control signal.

25. An integrated circuit, comprising:

a pair of terminals for connection to an output winding of a transformer having a modulated control signal imposed from an input winding carrying information for controlling a switching power stage, wherein the switching power stage produces a switched power output at a switching rate and includes at least one power switching transistor, wherein the modulated control signal is generated at a modulated rate greater than the switching rate of the switching power stage, wherein the modulated control signal encodes events according to codes specified by relative timing of transitions of the modulated control signal in multiple periods of the modulated control signal, the events including turn-on event corresponding to the turn-on time of the at least one power switching transistor; and

a demodulator circuit having inputs coupled to the pair of terminals and having an output coupled to a driver circuit for controlling the gate of the at least one power switching transistor, wherein the output of the demodulator is a gate control signal generated at the switching rate from a signal received by the pair of terminals from the output winding that contains the information at the modulated rate, and wherein the demodulator asserts the gate control signal upon detection of the turn-on event and de-asserts the gate control signal upon detection of another code.

26. An integrated circuit, comprising:

a pair of terminals for connection to an input winding of a transformer for imposing a control signal carrying information for controlling a switching power stage coupled to an output winding of the transformer, wherein the switching power stage produces a switched power output at a switching rate and includes at least one power switching transistor, and wherein the control signal carries said information at a modulated rate that is greater than the switching rate; and

a switching control circuit having an output coupled to at least one of the pair of terminals for determining a turn-on time and a turn-off time of the at least one power switching transistor and generating the control signal at a modulated rate that is greater than the switching rate, wherein the modulated control signal encodes events according to codes specified by relative timing of transitions of the modulated control signal in multiple periods of the modulated control signal, the events including a turn-on event corresponding to the turn-on time of the at least one power switching transistor.