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Integrated circuit memory devices including mode registers set using a data input/output bus

  • US 7,804,720 B2
  • Filed: 11/09/2009
  • Issued: 09/28/2010
  • Est. Priority Date: 07/20/2001
  • Status: Active Grant
First Claim
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1. An integrated circuit memory device comprising:

  • a memory cell array;

    a plurality of data input/output pins configured to receive data from a memory controller to be written to the memory cell array during a data write operation, the data input/output pins being further configured to provide data to the memory controller from the memory cell array during a data read operation; and

    a mode register configured to store information defining an operational characteristic of the memory device, wherein the mode register is configured to be set using the data input/output bus.

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