Security power control

• US 7,806,938 B2
• Filed: 06/16/2005
• Issued: 10/05/2010
• Est. Priority Date: 06/16/2005
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Cheong, Ze-Yng, Khor, Choon Hooi, Ng, Eng Yeow
• Primary Examiner(s): Barron, Jr.; Gilberto
• Assistant Examiner(s): Nobahar; Abdulhakim
• Application Number:
  US11/154,767
• Publication Number:
  US 20060288428A1
• Time in Patent Office: 1,937 Days
• Field of Search: 713/300, 713/310, 713/324, 713/340, 726/34, 726/36, 340/500, 340/524, 340/532, 340/572.9, 340 1462- 1465
• US Class Current: 726/35
• CPC Class Codes: G06F 21/81 by operating on the power supply, e.g. enabling or disabling power-on, sleep or resume operations
• CPC Class Codes: G06F 21/88 Detecting or preventing theft or loss
• CPC Class Codes: Y04S 40/20 Information technology specific aspects, e.g. CAD, simulation, modelling, system security

Abstract

A method and apparatus are described that control the supply of electrical power to one or more components of a computing device. Other embodiments are described and claimed.

Claims

1. An apparatus comprising:

a security power controller to;

determine an engagement status of a security lock for a computing device, wherein the security lock is to comprise a locking mechanism through which the security lock is to engage the computing device to limit physical removal of the computing device; and

disable a supply of electrical power to one or more components of the computing device based at least in part on the engagement status of the security lock,

wherein the security power controller is to comprise a first transistor to provide a first signal indicative of a state of a security locking feature;

a second transistor to provide a second signal indicative of the engagement status of the security lock; and

a third transistor coupled to the first and second transistors to receive the first and the second signals and to provide a third signal to control the supply of electrical power to one or more components of the computing device.

2. The apparatus of claim 1, further comprising a security locking feature selector to indicate whether the security power controller is to consider the engagement status of the security lock when the security power controller disables the supply of electrical power to the one or more components of the computing device.

3. The apparatus of claim 1, wherein the security power controller comprises a security power module, the apparatus further comprising:

a power source; and

a power supply for the computing device, the power supply to couple to the power source through the security power module.

4. The apparatus of claim 1, further comprising one or more indicators coupled to the security power controller to provide the engagement status of the security lock or a status of a security locking feature.

5. The apparatus of claim 4, wherein the one or more indicators are one or more visual indicators, audible indicators, or combinations thereof.

6. The apparatus of claim 3, wherein the power source comprises an alternating current/direct current (AC/DC) power adapter coupled to the security power module to provide the supply of the electrical power.

7. The apparatus of claim 1, wherein the security power controller and the computing device are implemented in a same device.

8. The apparatus of claim 1, wherein the computing device is a portable computing device.

9. The apparatus of claim 8, wherein the portable computing device is a laptop computer, a personal digital assistant, or a mobile phone.

10. The apparatus of claim 1, wherein in response to disengagement of the security lock, the security power controller is to cause transmission of a signal, through a basic input output system (BIOS) of the computing device, to cause display of a message on a user display device.

11. A method comprising:

determining an engagement status of a security lock for a computing device, wherein the security lock is to comprise a locking mechanism through which the security lock is to engage the computing device to limit physical removal of the computing device; and

disabling a supply of electrical power to one or more components of the computing device based at least in part on the engagement status of the security lock,

wherein a first transistor is to provide a first signal indicative of a state of a security locking feature;

a second transistor to provide a second signal indicative of the engagement status of the security lock; and

a third transistor coupled to the first and second transistors to receive the first and the second signals and to provide a third signal to control the supply of electrical power to one or more components of the computing device.

12. The method of claim 11, further comprising providing one or more indicia indicative of the engagement status of the security lock or a status of a security locking feature.

13. The method of claim 11, wherein the disabling the supply of electrical power occurs as long as a plurality of security locks are disengaged and a security locking feature is enabled.

14. The method of claim 11, wherein the disabling the supply of electrical power comprises decoupling a power source from a computing device power supply.

15. A system comprising:

a nonvolatile memory device coupled to a computing device to store data; and

a security power controller to;

determine an engagement status of a security lock for a computing device, wherein the security lock is to comprise a locking mechanism through which the security lock is to engage the computing device to limit physical removal of the computing device; and

disable a supply of electrical power to one or more components of the computing device based at least in part on the engagement status of the security lock,

wherein the security power controller is to comprise a first transistor to provide a first signal indicative of a current state of a security locking feature;

a second transistor to provide a second signal indicative of the engagement status of the security lock; and

a third transistor coupled to the first and second transistors to receive the first and the second signals and to provide a third signal to control the supply of electrical power to one or more components of the computing device.

16. The system of claim 15, wherein the computing device comprises volatile memory comprising one or more of RAM, DRAM, SRAM, or SDRAM.

17. The system of claim 15, wherein the nonvolatile memory device is one of a hard drive or a floppy disk drive.

18. The system of claim 15, wherein the security power controller comprises a security power module, the system further comprising:

a power source; and

a power supply for the computing device, the power supply to couple to the power source through the security power module.

19. The system of claim 15, further comprising one or more indicators coupled to the security power controller to provide the engagement status or a status of the security lock of a security locking feature.

20. The system of claim 15, further comprising a security locking feature selector to indicate whether the security power controller is to consider the engagement status of the security lock when the security power controller disables the supply of electrical power to the one or more components of the computing device.