Inductor for a system-on-a-chip and a method for manufacturing the same

• US 7,807,337 B2
• Filed: 01/03/2008
• Issued: 10/05/2010
• Est. Priority Date: 11/06/2003
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Hah, Sang-Rok, Kim, In-Ryong, Kim, Yi-Gwon, Lee, Ui-Hyoung, Lee, Hyo-Jong, Son, Hong-Seong
• Primary Examiner(s): Duda; Kathleen
• Assistant Examiner(s): Sullivan; Caleen O
• Application Number:
  US11/968,787
• Publication Number:
  US 20080102409A1
• Time in Patent Office: 1,006 Days
• Field of Search: 430/311, 430/313, 430/315, 430/319, 430/320
• US Class Current: 430/315
• CPC Class Codes: H01F 2017/0046 with a conductive path having a bridge
• CPC Class Codes: H01F 41/041 Printed circuit coils apparatus or processes for manufacturing printed circuits in general H05K3/00
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 27/08 including only semiconductor components of a single kind
• CPC Class Codes: H01L 28/10 Inductors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

An inductor for a system-on-a-chip and a method for manufacturing the inductor are disclosed. The inductor comprises a conductive line formed by connecting a plurality of conductive patterns grown from a seed layer formed on a lower wiring. The method comprises using an electrolytic plating process or an electroless plating process to grow the plurality of adjacent conductive patterns from the seed layer until they become connected. The method also enables adjusting the height and width of the conductive line to desired levels.

Claims

1. A method for manufacturing an inductor, the method comprising:

forming a mold layer on a seed layer, wherein the mold layer comprises a plurality of hole arrays exposing the seed layer;

growing conductive patterns from the seed layer to fill the hole arrays by application of a plating process; and

continuing application of the plating process after the conductive patterns fill the hole arrays until protrusions form on each one of the conductive patterns to extend over the mold layer, and until the protrusions amalgamate into a single conductive line on the mold layer,

wherein the single conductive line as formed by the amalgamated protrusions is arranged to form the inductor.

2. The method of claim 1, wherein forming the mold layer comprises:

forming a photoresist film on the seed layer; and

forming a photoresist pattern on the seed layer by patterning the photoresist film, wherein the photoresist pattern includes the hole arrays that expose the seed layer.

3. The method of claim 2, wherein forming the photoresist pattern comprises:

placing a mask over the photoresist film, the mask comprising a pattern having hole arrays arranged substantially in parallel; and

,

exposing the photoresist film using the mask.

4. The method of claim 2, further comprising:

forming an anti-reflective layer on the photoresist film.

5. The method of claim 4, further comprising:

removing the photoresist pattern and the anti-reflective layer after forming the conductive line.

6. The method of claim 5, wherein the photoresist pattern and the anti-reflective layer are removed using an organic stripper, a solution including ozone at a relatively high concentration, or a standard cleaning solution including carbon dioxide.

7. The method of claim 1, wherein forming the mold layer comprises:

forming an oxide layer on the seed layer;

forming a photoresist film on the oxide layer;

forming a photoresist pattern on the oxide layer by patterning the photoresist film; and

,

forming the hole arrays through the mold layer by etching the mold layer using the photoresist pattern as an etching mask.

8. The method of claim 1, further comprising:

forming a diffusion prevention layer between the seed layer and an underlying structure.

9. The method of claim 8, further comprising:

partially removing the seed layer and the diffusion prevention layer except for portions of the seed layer and the diffusion prevention layer positioned beneath the conductive line after forming the conductive line.

10. The method of claim 9, wherein the seed layer and the diffusion prevention layer are partially removed using a solution including hydrogen fluoride and hydrogen peroxide or hydrogen fluoride and nitric acid.

11. The method of claim 1, further comprising:

forming a protection layer on the conductive line.

12. A method of manufacturing an inductor, the method comprising:

forming a mold layer on a substrate comprising a conductive structure, wherein the mold layer comprises hole arrays having inner surfaces;

forming a diffusion prevention layer on the inner surfaces of the hole arrays and on the mold layer;

forming seed layer patterns on portions of the diffusion prevention layer positioned in the hole arrays;

growing conductive patterns from the seed layer patterns to fill the hole arrays by application of a plating process;

continuing application of the plating process after the conductive patterns fill the hole arrays until protrusions form on each one of the conductive patterns to extend over the mold layer, and until the protrusions amalgamate into a single a conductive line on the mold layer; and

forming a protection layer on the conductive line,

wherein the conductive line formed by the amalgamated protrusions and as protected by the protection layer is arranged to form the inductor.

13. The method of claim 12, wherein forming the seed layer patterns comprises:

forming a seed layer on the diffusion prevention layer; and

removing portions of the seed layer positioned on the mold layer.

14. The method of claim 13, wherein removing the portions of the seed layer is performed by a chemical mechanical polishing (CMP) process, an etch back process, or a combination of a CMP process and an etch back process.

15. The method of claim 12, wherein the plating process is an electrolytic plating process or an electroless plating process.

16. A method of manufacturing an inductor, the method comprising:

forming a mold layer on a substrate comprising a conductive structure, wherein the mold layer comprises hole arrays having inner surfaces;

forming a diffusion prevention layer on the inner surfaces of the hole arrays and on the mold layer;

forming a first seed layer on the diffusion prevention layer;

forming a capping layer on the first seed layer;

forming second seed layer patterns on portions of the capping layer positioned in the hole arrays;

growing conductive patterns from the second seed layer patterns to fill the hole arrays by application of a plating process;

continuing application of the plating process after the conductive patterns fill the hole arrays until protrusions form on each one of the conductive patterns to extend over the mold layer, and until the protrusions amalgamate into a single a conductive line on the mold layer; and

forming a protection layer on the conductive line,

wherein the conductive line as formed by the amalgamated protrusions and as protected by the protection layer is arranged to form the inductor.

17. The method of claim 16, wherein forming the second seed layer patterns comprises:

forming a second seed layer on the capping layer; and

removing portions of the second seed layer positioned on the mold layer.