Structure and method for forming a thick bottom dielectric (TBD) for trench-gate devices
First Claim
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1. A method of forming a semiconductor structure which includes a trench gate FET, comprising:
- forming a hard mask over a surface of a semiconductor region, the hard mask including;
(i) a first insulating layer over the surface of the semiconductor region, (ii) a first oxidation barrier layer over the first insulating layer, and (iii) a second insulating layer over the first oxidation barrier layer;
forming a plurality of trenches in the semiconductor region using the hard mask; and
forming a thick bottom dielectric (TBD) along a bottom of each trench, the first oxidation barrier layer preventing formation of a dielectric layer along the surface of the semiconductor region during formation of the TBD.
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Abstract
A semiconductor structure which includes a trench gate FET is formed as follows. A plurality of trenches is formed in a semiconductor region using a mask. The mask includes (i) a first insulating layer over a surface of the semiconductor region, (ii) a first oxidation barrier layer over the first insulating layer, and (iii) a second insulating layer over the first oxidation barrier layer. A thick bottom dielectric (TBD) is formed along the bottom of each trench. The first oxidation barrier layer prevents formation of a dielectric layer along the surface of the semiconductor region during formation of the TBD.
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Citations
20 Claims
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1. A method of forming a semiconductor structure which includes a trench gate FET, comprising:
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forming a hard mask over a surface of a semiconductor region, the hard mask including;
(i) a first insulating layer over the surface of the semiconductor region, (ii) a first oxidation barrier layer over the first insulating layer, and (iii) a second insulating layer over the first oxidation barrier layer;forming a plurality of trenches in the semiconductor region using the hard mask; and forming a thick bottom dielectric (TBD) along a bottom of each trench, the first oxidation barrier layer preventing formation of a dielectric layer along the surface of the semiconductor region during formation of the TBD. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A method of forming a semiconductor structure which includes a trench gate FET, comprising:
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forming a plurality of trenches in a semiconductor region using a mask which includes;
(i) a first oxide layer over a surface of the semiconductor region, (ii) a first nitride layer over the first oxide layer, and (iii) a second oxide layer over the first nitride layer;forming a third oxide layer along opposing sidewalls and bottom of each of the plurality of trenches; forming nitride spacers along the opposing sidewalls of each trench over the third oxide layer; and oxidizing silicon to form a thick bottom oxide (TBO) along the bottom of each trench, the first nitride layer preventing formation of oxide along the surface of the semiconductor region during the oxidizing of silicon, and the nitride spacers preventing formation of oxide along the opposing sidewalls of each trench during the oxidizing of silicon. - View Dependent Claims (15, 16, 17, 18, 19, 20)
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Specification