Test pattern of CMOS image sensor and method of measuring process management using the same

• US 7,807,996 B2
• Filed: 10/11/2006
• Issued: 10/05/2010
• Est. Priority Date: 10/11/2005
• Status: Expired due to Fees

• Current Assignee: DONGBU ELECTRONICS CO., LTD. (DB HiTek Co., Ltd.)
• Original Assignee: DONGBU ELECTRONICS CO., LTD. (DB HiTek Co., Ltd.)
• Inventors: Cho, Eun Sang, Kim, Kee Ho
• Primary Examiner(s): Le, Thao X
• Assistant Examiner(s): ARORA, AJAY
• Application Number:
  US11/545,462
• Publication Number:
  US 20070080347A1
• Time in Patent Office: 1,455 Days
• Field of Search: 257/48
• US Class Current: 257/48
• CPC Class Codes: H01L 22/34 Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line switching, multiplexing, gating devices G01R19/25; process control with lithography, e.g. dose control, G03F7/20; structures for alignment control by optical means G03F7/70633
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

The test pattern according to the present invention consists of an opaque metal film pattern formed on a semiconductor substrate, an insulating film formed on the semiconductor substrate and the metal film pattern, a red color filter formed on the insulating film, a planarization layer formed on the insulating film and the red color filter, and a number of micro-lenses formed on the planarization layer.

Claims

1. A method of measuring process management of the fabrication of a CMOS image sensor, comprising:

forming a test pattern of a CMOS image sensor, wherein the test pattern comprises an opaque metal film pattern formed on a semiconductor substrate, an insulating film formed on the semiconductor substrate and the metal film pattern, a single-color filter formed on the insulating film, the single-color filter being only a red color filter, a planarization layer formed on the insulating film and the single-color filter, and a number of micro-lenses formed on the planarization layer; and

scanning the test pattern at a plurality of angles using a light source of short wavelength, detecting a scattered beam, and measuring the process management of the micro-lenses and the color filter.

2. The method of claim 1, wherein the light source of short wavelength is a helium (He)-neon (Ne) laser.

3. The method of claim 1, wherein the angle is incident to the surface of the test pattern within the range of −

47°

to 47°

.

4. The method of claim 1, wherein the insulating film includes undoped silicate glass.

5. A method for forming a test pattern of a CMOS image sensor, comprising:

forming an opaque metal film pattern on a semiconductor substrate;

forming an insulating film on the semiconductor substrate and the metal film pattern;

forming a single-color filter on the insulating film, the single-color filter being only a red color filter;

forming a planarization layer on the insulating film and the single-color filter; and

forming a plurality of micro-lenses on the planarization layer.

6. The method of claim 5, wherein the metal film pattern is composed of aluminum or copper.

7. The method of claim 5, wherein the insulating film includes undoped silicate glass.

8. The method of claim 5, wherein the test pattern further comprises silicon nitride (SiN) between the insulating film and the single-color filter.