Deferred shading graphics pipeline processor having advanced features

• US 7,808,503 B2
• Filed: 12/19/2006
• Issued: 10/05/2010
• Est. Priority Date: 08/20/1998
• Status: Expired due to Term

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Papakipos, Matthew N., Hong, Bo, Nguyen, Tuan D., Redgrave, Jason R., Tsay, Albert Suan-Wei, Dodgen, Stephen L., Li, Sidong, Go, Shun Wai, Grass, Joseph P., Ng, Sam, Gong, Zhaoyu, Tuck, Nathan D., Cuan, George, Yo, Thomas Y., Hessel, Richard E., Hsu, Hengwei, Benkual, Jack, Trivedi, Sushma S., Arnold, Vaughn T., Fung, Lindy, Duluk, Jerome F. Jr., Rashid, Abbas, Mammen, Abraham, Bratt, Joseph P., Fang, Emerson S.
• Primary Examiner(s): Nguyen; Hau H
• Application Number:
  US11/613,093
• Publication Number:
  US 20070165035A1
• Time in Patent Office: 1,386 Days
• Field of Search: 345/505, 345/506, 345/557, 345/421, 345/427, 345/552
• US Class Current: 345/506
• CPC Class Codes: G06T 1/60 Memory management
• CPC Class Codes: G06T 11/001 Texturing; Colouring; Generation of texture or colour inpainting G06T5/77
• CPC Class Codes: G06T 11/40 Filling a planar surface by adding surface attributes, e.g. colour or texture
• CPC Class Codes: G06T 15/005 General purpose rendering architectures
• CPC Class Codes: G06T 15/04 Texture mapping
• CPC Class Codes: G06T 15/20 Perspective computation
• CPC Class Codes: G06T 15/30 Clipping
• CPC Class Codes: G06T 15/40 Hidden part removal
• CPC Class Codes: G06T 15/50 Lighting effects
• CPC Class Codes: G06T 15/80 Shading
• CPC Class Codes: G06T 15/83 Phong shading
• CPC Class Codes: G06T 15/87 Gouraud shading

Abstract

A deferred shading graphics pipeline processor and method are provided encompassing numerous substructures. Embodiments of the processor and method may include one or more of deferred shading, a tiled frame buffer, and multiple?stage hidden surface removal processing. In the deferred shading graphics pipeline, hidden surface removal is completed before pixel coloring is done. The pipeline processor comprises a command fetch and decode unit, a geometry unit, a mode extraction unit, a sort unit, a setup unit, a cull unit, a mode injection unit, a fragment unit, a texture unit, a Phong lighting unit, a pixel unit, and a backend unit.

Claims

1. A deferred graphics pipeline processor comprising:

a geometry unit configured to receive primitive data related to a vertex on a surface and output a data stream in response thereto;

a mode extraction unit configured to receive the data stream from the geometry unit and separate the data stream into spatial data and non-spatial data;

a sorting unit configured to receive the spatial data from the mode extraction unit for storage;

a multi-buffered polygon memory configured to receive the non-spatial data from the mode extraction unit for storage; and

a mode injection unit configured to retrieve at least a portion of the non-spatial data from the polygon memory and output retrieved non-spatial data;

wherein

the mode injection unit is associated with at least one cache to determine whether the retrieved non-spatial data is cached, and

the mode injection unit is operative to read the non-spatial data previously stored in a first frame simultaneously while the mode extraction unit is operative to store the non-spatial data in a second frame.

2. The deferred graphics pipeline processor of claim 1, wherein the mode injection unit is further operative to transmit the non-spatial data when the non-spatial data is not previously cached.

3. The deferred graphics pipeline processor of claim 1, wherein the non-spatial data comprises at least one of:

light positions, light parameters, shading parameters, shading operators, and textures coordinates.

4. The deferred graphics pipeline processor of claim 1, wherein the non-spatial data comprises per-frame data that changes at least one time during a frame.

5. The deferred graphic pipeline processor of claim 1, wherein the non-spatial data comprises per-object data that changes between a first object and a second object in the scene.

6. The deferred graphic pipeline processor of claim 1, wherein the non-spatial data comprises per-vertex data that changes between a first vertex and a second vertex in the frame.

7. The deferred graphic pipeline processor of claim 1, wherein the mode extraction unit is further operative to transmit a pointer along with the non-spatial data to the sorting unit associated with the spatial data stored in the polygon memory.

8. The deferred graphics pipeline processor of claim 1, wherein the mode extraction unit and the mode injection unit is further configured to block the data stream from being further separated.

9. The deferred graphics pipeline processor of claim 1, wherein the mode extraction unit stores a copy of the non-spatial data and divides the non-spatial data into a multiple of pipeline state partitions.

10. The deferred graphics pipeline processor of claim 9, wherein the mode extraction unit is further operative to updated at least one of the multiple of state partitions and update the spatial data stored in the polygon memory in response thereof.

11. The deferred graphics pipeline processor of claim 9, wherein the multiplicity of state partitions includes at least one of:

a first state partition describing shading properties and operations of a front of the primitive;

a second state partition describing shading properties and operations of a back face of the primitive;

a third state partition describing a first set of textures of a front face of the primitive;

a fourth state partition describing properties and operations of remaining textures of a front face of the primitive;

a fifth state partition describing a first set of textures of a back face of the primitive;

a sixth state partition describing properties and operations of remaining textures of the back face of the primitive;

a seventh state partition describing lighting settings and lighting operations;

an eight state partition describing per-fragment parameters and operations; and

a ninth state partition a stipple parameters and stipple operations.

12. The deferred graphics pipeline processor of claim 11, wherein the state partition describing lighting settings and light operations comprises:

information for a multiplicity of lights used in fragment lighting computations; and

information regarding a global state affecting lighting of fragment.

13. The deferred graphics pipeline processor of claim 9, wherein the mode extraction unit is further operative to copy the non-spatial data and store the non-spatial data.

14. The deferred graphics pipeline processor of claim 13, wherein the mode extraction unit is further operative to compare the non-spatial data of the data stream to previously stored non-spatial data to determine whether to update the non-spatial data.

15. The deferred graphics pipeline processor of claim 14, wherein the mode extraction unit is further operative to update the previously stored non-spatial data in the mode extraction unit with the non-spatial data of the data stream when the non-spatial data is unequal to the previously stored non-spatial data.

16. The deferred graphic pipeline processor of claim 15, wherein the mode extraction unit is further operative to set a flag when the previously stored non-spatial data is updated.

17. The deferred graphic pipeline processor of claim 16, wherein the mode extraction unit is further operative to transmit the non-spatial data to the polygon memory when the flag is set.

18. The deferred graphic pipeline processor of claim 17, wherein the flag is cleared once the non-spatial data is stored in the polygon memory.

19. The deferred graphic pipeline processor of claim 1, wherein the polygon memory comprises a rambus memory.

20. A method for processing pipeline data comprising:

receiving primitive data related to a vertex on a surface of a screen and outputting a data stream in response thereto;

separating the data stream into spatial data corresponding to hidden surface removal data and non-spatial data corresponding to rasterization data;

storing the spatial data in a first memory;

storing the non-spatial data in a second memory, wherein storing the non-spatial data further comprises reading the non-spatial data previously stored in a first frame simultaneously while storing the non-spatial data in a second frame; and

retrieving at least a portion of the non-spatial data from the second memory; and

determining whether retrieved non-spatial data is cached; and

transmitting at least a portion of the non-spatial data in response thereto.

21. The method of claim 20, wherein determining whether the retrieved non-spatial data further comprises transmitting the non-spatial data when the non-spatial data is not cached.

22. The method of claim 20, wherein the non-spatial data comprises at least one of:

light positions, light parameters, shading parameters, shading operators, and textures coordinates.

23. The method of claim 20, wherein the non-spatial data comprises per-frame data that changes at least one time during a frame.

24. The method of claim 20, wherein the non-spatial data comprises per-object data that changes between a first object and a second object in the scene.

25. The method of claim 20, wherein the non-spatial data comprises per-vertex data that changes between a first vertex and a second vertex in the frame.

26. The method of claim 20, wherein separating the data stream further comprises storing a copy of the non-spatial data in a third memory.

27. The method of claim 26, wherein storing the copy of the non-spatial data further comprises dividing the non-spatial data into a multiple of pipeline state partitions.

28. The method of claim 27, further comprising updating at least one of the multiple of state partitions and updating the non-spatial data stored in the second in response thereof.

29. The method of claim 27, wherein the multiplicity of state partitions includes at least one of:

a first state partition describing shading properties and operations of a front of at least one of the primitives;

a second state partition describing shading properties and operations of a back face of the primitive;

a third state partition describing a first set of textures of a front face of the primitive;

a fourth state partition describing properties and operations of remaining textures of a front face of the primitive;

a fifth state partition describing a first set of textures of a back face of the primitive;

a sixth state partition describing properties and operations of remaining textures of the back face of the primitive;

a seventh state partition describing lighting settings and lighting operations;

an eight state partition describing per-fragment parameters and operations; and

a ninth state partition a stipple parameters and operations.

30. The method of claim 20, further comprising copying and storing the non-spatial data in a third memory.

31. The method of claim 30, further comprising comparing the non-spatial data of the data stream to previously stored non-spatial data in the third memory to determine whether update the non-spatial data.

32. The method of claim 31, further comprising updating the previously stored non-spatial data when the received non-spatial data is unequal to the previously stored non-spatial data.

33. The method of claim 32, further comprising setting a flag when the previously stored non-spatial data is updated.

34. The method of claim 33, further comprising transmitting the non-spatial data to the second memory when the flag is set.

35. The method of claim 34, further comprising clearing the flag once the non-spatial data is stored in the second memory.