Power management for digital devices
First Claim
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1. An apparatus, comprising:
- a programmable memory for storing a plurality of instructions representing a predetermined power management priority rule;
a core processor coupled to said programmable memory for monitoring an amount of power available from a plurality of power supplies and for monitoring an amount of power being supplied to a plurality of power converter components that generate power outputs, said core processor also for executing said plurality of instructions from said programmable memory;
a selector circuit coupled to said core processor for receiving monitoring information from said core processor, said selector circuit also for selecting a power supply of said plurality of power supplies according to said predetermined power management priority rule and based on said amount of power being supplied to said power converter components, and for limiting a current sunk from said power supply to a specified level; and
a control circuit coupled to said core processor for receiving monitoring information from said core processor, said control circuit also for allocating power to a power converter component of said plurality of power converter components based on said amount of power available from said power supplies.
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Abstract
A method according to one embodiment includes coupling at least one power supply to a power bus comprised in a digital camera. The method of this embodiment may also include allocating power to at least one component of the digital camera by coupling at least one component to the power bus based on at least one power management priority rule. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
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Citations
17 Claims
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1. An apparatus, comprising:
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a programmable memory for storing a plurality of instructions representing a predetermined power management priority rule; a core processor coupled to said programmable memory for monitoring an amount of power available from a plurality of power supplies and for monitoring an amount of power being supplied to a plurality of power converter components that generate power outputs, said core processor also for executing said plurality of instructions from said programmable memory; a selector circuit coupled to said core processor for receiving monitoring information from said core processor, said selector circuit also for selecting a power supply of said plurality of power supplies according to said predetermined power management priority rule and based on said amount of power being supplied to said power converter components, and for limiting a current sunk from said power supply to a specified level; and a control circuit coupled to said core processor for receiving monitoring information from said core processor, said control circuit also for allocating power to a power converter component of said plurality of power converter components based on said amount of power available from said power supplies. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method, comprising:
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storing a plurality of instructions representing a predetermined power management priority rule in a programmable memory; monitoring an amount of power available from a plurality of power supplies; monitoring an amount of power being supplied to a plurality of power converter components that generate power outputs that consume available power; executing said plurality of instructions from said programmable memory; selecting a power supply from said plurality of power supplies according to said predetermined power management priority rule and based on said amount of power being supplied to said power converter components; allocating power among said power converter components based on said amount of power available from said power supplies; and limiting a current sink from said power supply to a specified level. - View Dependent Claims (8, 9, 10, 11)
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12. A camera comprising a power management processor, said power management processor comprising:
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capacitor charger circuitry for charging a photoflash capacitor to enable a flash, and for generating a feedback signal; a programmable memory for storing a plurality of instructions representing a predetermined power management priority rule; a core processor coupled to said capacitor charger circuitry and said programmable memory for executing said plurality of instructions from said programmable memory; and a selector circuit coupled to said core processor for selecting a power supply of a plurality of power supplies;
wherein said power management processor is operable for receiving monitoring information from said core processor and for allocating power to a power converter component of a plurality of power converter components based on an amount of voltage available from said plurality of power supplies;
said power management processor also operable for monitoring said amount of voltage available from said plurality of power supplies and for monitoring an amount of current being supplied to said plurality of power converter components that generate power outputs, for selecting a power supply of said plurality of power supplies according to said predetermined power management priority rule and based on said amount of current being supplied to said power converter components, and for limiting a current sunk from said power supply to a specified level. - View Dependent Claims (13, 14, 15, 16, 17)
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Specification