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Power management for digital devices

  • US 7,808,548 B1
  • Filed: 12/30/2004
  • Issued: 10/05/2010
  • Est. Priority Date: 04/15/2004
  • Status: Active Grant
First Claim
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1. An apparatus, comprising:

  • a programmable memory for storing a plurality of instructions representing a predetermined power management priority rule;

    a core processor coupled to said programmable memory for monitoring an amount of power available from a plurality of power supplies and for monitoring an amount of power being supplied to a plurality of power converter components that generate power outputs, said core processor also for executing said plurality of instructions from said programmable memory;

    a selector circuit coupled to said core processor for receiving monitoring information from said core processor, said selector circuit also for selecting a power supply of said plurality of power supplies according to said predetermined power management priority rule and based on said amount of power being supplied to said power converter components, and for limiting a current sunk from said power supply to a specified level; and

    a control circuit coupled to said core processor for receiving monitoring information from said core processor, said control circuit also for allocating power to a power converter component of said plurality of power converter components based on said amount of power available from said power supplies.

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