Digital repeater having bandpass filtering, adaptive pre-equalization and suppression of natural oscillation

• US 7,809,047 B2
• Filed: 11/11/2002
• Issued: 10/05/2010
• Est. Priority Date: 11/12/2001
• Status: Active Grant

• Current Assignee: Strong Force IoT Portfolio 2016, LLC (Strong Force Intellectual Capital, LLC)
• Original Assignee: Andrew LLC (CommScope Holding Company, Inc.)
• Inventors: Kummetz, Thomas
• Primary Examiner(s): Payne; David C
• Assistant Examiner(s): Wong; Linda
• Application Number:
  US10/495,144
• Publication Number:
  US 20050215193A1
• Time in Patent Office: 2,885 Days
• Field of Search: 455/73, 455/570, 455/91, 455/114.2, 455/114.3, 455/130, 375/211, 375/295, 375/296, 375/316
• US Class Current: 375/211
• CPC Class Codes: H04B 7/15585 by interference cancellation

Abstract

Repeaters, event those having digital processing, exist. The significant drawback of these digital repeaters is that the computational complexity or the processing speed has to be very high in order to guarantee, particularly when compensating for echo, that the necessary delay does not excessively impair the performance. The aim of the invention is to provide a structure of the repeater in which the computational complexity is reduced without this reduction having a negative effect on the performance during signal filtering and/or suppression of natural oscillation. To this end, the invention provides that in order to carry out bandpass filtering, adaptive pre-equalization and suppression of the natural oscillation, the components of the repeater in the uplink branch and downlink branch are arranged in a designated sequence, whereby duplex filters are used for coupling both repeater branches to the antennes. In addition, only one reconfiguration in the modules at the user is necessary in order to adapt to user-specific requirements. The invention is used in the field of digital repeaters for data systems technology and telecommunications technology.

Claims

1. A cellular repeater having an uplink path and a downlink path and configured for use with a donor antenna and coverage antenna for handling wireless signals, the repeater, in each of those paths, comprising:

an input analog mixer for frequency down conversion of an input signal to an antenna;

an analog-to-digital converter communicating with an output of said input analog mixer to convert the input signal into a digital repeater signal;

an echo cancellation circuit communicating in-line with an output of said analog-to-digital converter and operable to reduce an echo signal portion of an input signal to an antenna coupled to the repeater, wherein the echo signal portion is wirelessly received from another antenna coupled to the repeater;

an adaptive complex filter operably coupled with the echo cancellation circuit for providing a cancellation signal to the echo cancellation circuit to reduce the echo signal portion in the input signal;

a DSP processor coupled to the adaptive complex filter and operable for adjusting the filter coefficients of the filter to thereby adjust the cancellation signal produced by the adaptive complex filter;

a digital down-conversion circuit coupled in-line in the circuit;

decimation and filter circuitry coupled in-line in the circuit for digitally reducing the sampling rate of the digital signal;

a digital band pass channel filter operably receiving the down-converted and digitally reduced signal, the DSP processor coupled for configuring the band pass channel filter to determine the operating band of the repeater;

a digital up-conversion circuit communicating with an output of said digital band pass channel filter;

interpolation and filter circuitry coupled in-line in the circuit for digitally increasing the sampling rate of the digital signal;

each of said digital up-conversion and down- conversion circuits having a quadrature modulation circuit and sharing a digital oscillator;

a digital-to-analog converter communicating with an output of said digital band pass channel filter for converting the digital repeater signal to an analog output signal;

an output analog mixer for frequency up-conversion, said output analog mixer communicating with an output of said digital-to-analog converter.

2. The repeater of claim 1, wherein the adaptive complex filter includes an adaptive FIR filter programmed by the DSP processor, the DSP processor configured for estimating a transfer function of a feedback path in the repeater and computing an inverse transfer function and associated FIR filter coefficients.

4. The repeater of claim 2, further comprising switching circuitry communicating with said FIR filter and the DSP processor to switch between an echo compensation mode and a suppression of interference mode.

5. The repeater of claim 1, wherein the common digital oscillator is a numerically controlled oscillator (NCO).

6. The repeater of claim 1, wherein said band pass channel filter includes a FIR filter having filter coefficients which are computed off-line to fulfill requirements for filtering of both an I-component and a Q-component of the repeater signal.

7. The repeater of claim 1, further comprising an input band limiting filter and an input adjustable amplifier, both disposed upstream of said input analog mixer, wherein said output analog mixer is followed by an output band limiting filter.

8. The repeater of claim 7, wherein said input band limiting filter and said output band limiting filters are surface acoustic wave filters (SAW filters).

9. The repeater of claim 1, further comprising an anti-aliasing filter positioned between said input analog mixer and said analog-to-digital converter and a low-pass filter positioned between said digital-to-analog converter and said output analog mixer.

10. The repeater of claim 1 further comprising an adaptive distortion corrector communicating with an output of the digital band pass channel filter.

3. A repeater comprising:

an input analog mixer for frequency down conversion of an input signal;

an analog-to-digital converter communicating with an output of said input analog mixer to convert the input signal into a digital repeater signal;

an echo cancellation circuit communicating in-line with an output of said analog-to-digital converter to reduce an echo signal portion of an input signal;

an adaptive complex filter including an adaptive FIR filter coupled with the echo cancellation circuit for providing a cancellation signal to the echo cancellation circuit to reduce the echo signal portion in the input signal;

a DSP processor coupled to the adaptive complex filter for adjusting the filter coefficients of the FIR filter to thereby adjust the cancellation signal, the DSP processor configured for estimating a transfer function of a feedback path in the repeater and computing an inverse transfer function and associated FIR filter coefficients;

a digital down-conversion circuit coupled in-line in the circuit and decimation and filter circuitry coupled with the digital down-conversion circuit;

a digital band pass channel filter communicating with said echo cancellation circuit, the DSP processor coupled for configuring the band pass channel filter to determine the operating band of the repeater;

a digital up-conversion circuit communicating with an output of said digital band pass channel filter;

interpolation and filter circuitry coupled in-line in the circuit for digitally increasing the sampling rate of the digital signal;

each of said digital up-conversion and down-conversion circuits having a quadrature modulation circuit and sharing a common digital oscillator;

a digital-to-analog converter communicating with an output of said digital band pass channel filter for converting the repeater signal to an analog output signal;

an output analog mixer for frequency up-conversion, said output analog mixer communicating with an output of said digital-to-analog converter;

the FIR adaptive filter coupled to communicate with a dedicated input constituting a reference input of an unwanted signal for suppression of an external interferer in a received signal, the DSP processor being configured for computing a cross-correlation between the reference input and a remnant output signal and for adjusting a delay in said reference input and said FIR filter to eliminate said external interferer.

11. A repeater circuit for use with a receive antenna and a transmit antenna for reducing interference, the repeater circuit comprising:

a filter for filtering input signals from a receive antenna;

an amplifier coupled to the filter for amplifying the input signals;

an input analog mixer for downconverting the input signals;

an analog-to-digital convertor communicating for converting the input signals from an analog format to a digital format;

an interference cancellation circuit for removing interference in the input signals, the interference cancellation circuit including an adaptive filter and a reference input signal representing an unwanted interference signal;

a DSP processor for computing a cross-correlation between the reference input signal and an output signal and adjusting the adaptive filter for removing interference;

a digital down-conversion circuit coupled in-line in the circuit and decimation and filter circuitry coupled with the digital down-conversion circuit;

a digital up-conversion circuit coupled in-line in the circuit and interpolation and filter circuitry coupled with the digital upconversion circuitry;

each of said digital up-conversion and down-conversion circuits having a quadrature modulation circuit and sharing a digital oscillator;

a digital-to-analog signal convertor communicating for converting the input signals from a digital format to an analog format;

an output analog mixer for upconverting the input signals;

an amplifier for amplifying the upconverted input signals to be transmitted as output signals from a transmit antenna.

12. The repeater of claim 11 wherein the DSP circuit adjusts the delay in the interference cancellation circuit for removing interference.