Network interface device that can transfer control of a TCP connection to a host CPU

• US 7,809,847 B2
• Filed: 01/04/2005
• Issued: 10/05/2010
• Est. Priority Date: 10/14/1997
• Status: Expired due to Fees

• Current Assignee: Alacritech, Inc.
• Original Assignee: Alacritech, Inc.
• Inventors: Higgen, David A., Philbrick, Clive M., Boucher, Laurence B., Craft, Peter K., Blightman, Stephen E. J., Starr, Daryl D.
• Primary Examiner(s): Nguyen; Phuoc
• Application Number:
  US11/029,863
• Publication Number:
  US 20050160139A1
• Time in Patent Office: 2,100 Days
• Field of Search: 709/227, 709/230
• US Class Current: 709/230
• CPC Class Codes: G06F 13/28 using burst mode transfer, e.g. direct memory access DMA, cycle steal G06F13/32 takes precedence
• CPC Class Codes: G06F 13/4022 using switching circuits, e.g. switching matrix, connection or expansion network G06F13/4009 takes precedence
• CPC Class Codes: G06F 13/4221 being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
• CPC Class Codes: H04L 45/66 Layer 2 routing, e.g. in Ethernet based MAN's
• CPC Class Codes: H04L 45/745 Address table lookup; Address filtering
• CPC Class Codes: H04L 47/10 Flow control; Congestion control
• CPC Class Codes: H04L 47/193 at the transport layer, e.g. TCP related
• CPC Class Codes: H04L 47/36 by determining packet size, e.g. maximum transfer unit [MTU]
• CPC Class Codes: H04L 47/50 Queue scheduling
• CPC Class Codes: H04L 47/6225 Fixed service order, e.g. Round Robin
• CPC Class Codes: H04L 49/90 Buffering arrangements
• CPC Class Codes: H04L 49/901 using storage descriptor, e.g. read or write pointers
• CPC Class Codes: H04L 49/9021 Plurality of buffers per packet
• CPC Class Codes: H04L 49/9042 Separate storage for different parts of the packet, e.g. header and payload
• CPC Class Codes: H04L 49/9052 with buffers of different sizes
• CPC Class Codes: H04L 49/9063 Intermediate storage in different physical parts of a node or terminal
• CPC Class Codes: H04L 49/9068 in the network interface card
• CPC Class Codes: H04L 49/9073 Early interruption upon arrival of a fraction of a packet
• CPC Class Codes: H04L 49/9094 Arrangements for simultaneous transmit and receive, e.g. simultaneous reading/writing from/to the storage element
• CPC Class Codes: H04L 61/00 Network arrangements, protocols or services for addressing or naming
• CPC Class Codes: H04L 61/10 : of different types
• CPC Class Codes: H04L 67/10 : in which an application is distributed across nodes in the network software deployment G06F8/60; multiprogramming arrangements G06F9/46
• CPC Class Codes: H04L 67/34 : involving the movement of software or configuration parameters network booting or remote initial program loading [RIPL] G06F9/4416
• CPC Class Codes: H04L 67/62 : Establishing a time schedule for servicing the requests
• CPC Class Codes: H04L 67/63 : Routing a service request depending on the request content or context
• CPC Class Codes: H04L 69/08 : Protocols for interworking; Protocol conversion
• CPC Class Codes: H04L 69/12 : Protocol engines
• CPC Class Codes: H04L 69/16 : Implementation or adaptation of Internet protocol [IP], of transmission control protocol [TCP] or of user datagram protocol [UDP]
• CPC Class Codes: H04L 69/161 : Implementation details of TCP/IP or UDP/IP stack architecture; Specification of modified or new header fields
• CPC Class Codes: H04L 69/162 : involving adaptations of sockets based mechanisms secure socket layer H04L63/168
• CPC Class Codes: H04L 69/163 : In-band adaptation of TCP data exchange; In-band control procedures
• CPC Class Codes: H04L 69/166 : IP fragmentation; TCP segmentation
• CPC Class Codes: H04L 69/22 : Parsing or analysis of headers
• CPC Class Codes: H04L 69/32 : Architecture of open systems interconnection [OSI] 7-layer type protocol stacks, e.g. the interfaces between the data link level and the physical level
• CPC Class Codes: H04L 9/40 : Network security protocols

Abstract

An intelligent network interface card (INIC) or communication processing device (CPD) works with a host computer for data communication. The device provides a fast-path that avoids protocol processing for most messages, greatly accelerating data transfer and offloading time-intensive processing tasks from the host CPU. The host retains a fallback processing capability for messages that do not fit fast-path criteria, with the device providing assistance such as validation even for slow-path messages, and messages being selected for either fast-path or slow-path processing. A context for a connection is defined that allows the device to move data, free of headers, directly to or from a destination or source in the host. The context can be passed back to the host for message processing by the host. The device contains specialized hardware circuits that are much faster at their specific tasks than a general purpose CPU. A preferred embodiment includes a trio of pipelined processors devoted to transmit, receive and utility processing, providing full duplex communication for four Fast Ethernet nodes.

Claims

1. A method of processing communication for host computer having a central processing unit (CPU) and a network interface device, the method comprising:

storing, in a memory of the network interface device, a Transmission Control Protocol (TCP) connection for the host, the TCP connection being at least in part identified by an Internet Protocol (IP) address and TCP port of the host, and an IP address and TCP port of a remote host;

processing the TCP connection according to a finite state machine (FSM), including updating a state of the TCP connection; and

transferring control of the TCP connection from the network interface device to the CPU, including transferring the state of the TCP connection.

2. The method of claim 1, wherein the FSM is either a receive state machine or a transmit state machine.

3. The method of claim 1, further comprising parsing, by the network interface device, a header of a received packet to determine a TCP source port and a TCP destination port of the packet.

4. The method of claim 1, further comprising checksumming, by the network interface device, a TCP header of a received packet.

5. The method of claim 1, further comprising performing, by the network interface device, TCP protocol processing on a packet that corresponds to the TCP connection.

6. The method of claim 1, further comprising comparing, by the network interface device, a TCP source port and a TCP destination port of a received packet with the TCP port of the host and the TCP port of the remote host.

7. The method of claim 1, further comprising creating, by the network interface device, a header of a packet, the header including the IP addresses and TCP ports of the TCP connection.

8. The method of claim 1, further comprising creating, by the network interface device, a header of the packet, the header including a TCP checksum.

9. The method of claim 1, further comprising sending, by the network interface device, data from the packet, without any header, to a destination in host memory for an application that corresponds to the TCP port of the host, prior to the transferring control of the TCP connection from the network interface device to the CPU.

10. The method of claim 1, wherein the transferring control of the TCP connection is intitiated by receiving, by the network interface device, a communication from the host CPU.

11. A network interface device for a host computer having a central processing device (CPU), the network interface device comprising:

a memory that stores a Transmission Control Protocol (TCP) connection of the host, the TCP connection being at least in part identified by an Internet Protocol (IP) address and TCP port of the host, and an IP address and TCP port of a remote host;

a processor that updates a state of the TCP connection in accordance with a finite state machine (FSM); and

a mechanism to transfer control of the TCP connection and the state of the TCP connection to the CPU.

12. The network interface device of claim 11, wherein the mechanism includes a data structure containing the state of the TCP connection.

13. The network interface device of claim 11, wherein the FSM is either a receive state machine or a transmit state machine.

14. The network interface device of claim 11, further comprising a communication from the CPU that is stored in the memory to activate the mechanism.

15. The network interface device of claim 11, wherein the network interface device is an intelligent network interface card that is coupled to the host computer.

16. The network interface device of claim 11, wherein the network interface device is a communications processing device that is integrated into the host computer.

17. The network interface device of claim 11, wherein the network interface device includes a processor that performs TCP processing.

18. The network interface device of claim 11, wherein the network interface device includes a processor that maintains the state of the TCP connection.

19. The network interface device of claim 11, wherein the network interface device includes protocol processing hardware to perform TCP processing.

20. The apparatus of claim 11, further comprising means for comparing IP source and destination addresses and TCP source and destination ports that are contained in a header of a network packet with the IP addresses and TCP ports of the TCP connection.

21. A network interface device for a host computer having a central processing device (CPU), the network interface device comprising:

a processor to maintain a Transmission Control Protocol (TCP) connection of the host, the TCP connection being at least in part identified by an Internet Protocol (IP) address and TCP port of the host, and an IP address and TCP port of a remote host, the TCP connection including variable TCP state information; and

a mechanism to transfer the variable TCP state information and control of the TCP connection to the CPU.

22. The network interface device of claim 21, wherein the mechanism includes a data structure containing the variable TCP state information.