Standby mode for power management

• US 7,809,961 B2
• Filed: 11/13/2006
• Issued: 10/05/2010
• Est. Priority Date: 11/14/2005
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Dahan, Franck, Dubost, Gilles, Seigneret, Franck
• Primary Examiner(s): Stoynov; Stefan
• Application Number:
  US11/559,388
• Publication Number:
  US 20070113111A1
• Time in Patent Office: 1,422 Days
• Field of Search: 713/300, 713/322, 713/323, 455/13.4, 455/127.1, 455/127.5, 455/345.5, 455/522, 455/574, 455/343.5, 345/52, 345/211, 365/227, 365/229
• US Class Current: 713/300
• CPC Class Codes: G06F 1/3228 Monitoring task completion, e.g. by use of idle timers, stop commands or wait commands
• CPC Class Codes: G06F 1/3237 by disabling clock generation or distribution
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management
• CPC Class Codes: Y02D 30/50 in wire-line communication networks, e.g. low power modes or reduced link rate

Abstract

An apparatus and method for controlling standby mode in an electronic device. In standby mode, power and clock signals are reduced or stopped to conserve power. The apparatus includes an initiator module coupled to a power and clock control module (PCCM). When the initiator module meets conditions for standby mode, the initiator module sends a standby signal to the PCCM and does not interact with other initiator, target, or interconnect modules. When the PCCM communicates a wait signal, the initiator module enters standby mode. When the initiator module detects a wakeup event, the standby signal is deactivated. In this state, the initiator module may process information but may not interact with other modules. When the PCCM deactivates the wait signal and returns power and clock signal to steady state levels, initiator module may resume normal operation.

Claims

1. An apparatus, comprising:

a control module with a power output, a clock output, a wait output, and a standby input;

an initiator module with a power input coupled to the power output of the control module, a clock input coupled to the clock output of the control module, a wait input coupled to the wait output of the control module, and a standby output coupled to the standby input of the control module, wherein the initiator module is configured to automatically detect an idle condition of the initiator module and to automatically transmit a standby signal to the control module in response to detecting the idle condition;

wherein the initiator module is configured to automatically enter a standby mode after transmitting the standby signal to the control module;

wherein the standby mode allows the initiator module to continue communicating with the control module while preventing the initiator module from initiating communication with other modules;

wherein the control module is configured to automatically transmit a wait signal to the initiator module in response to receiving the standby signal from the initiator module;

wherein the initiator module is configured to automatically deactivate the standby signal in response to detecting a wakeup event;

wherein the control module is configured to deactivate the wait signal in response to detecting that the standby signal has been deactivated;

wherein the initiator module is configured to transition from the standby mode to a normal mode in response to detecting that the wait signal has been deactivated; and

wherein the normal mode allows the initiator module to initiate communication with the other modules.

2. The apparatus of claim 1, wherein the initiator module is a processor, graphics accelerator, display controller, audio interface, digital signal processor, microcontroller unit (MCU), direct memory access (DMA) device, video accelerator, or a universal serial bus (USB) device.

3. The apparatus of claim 1, wherein the control module is configured to automatically reduce power and at least one clock signal to the initiator module in response to receiving the standby signal from the initiator module.

4. The apparatus of claim 1, wherein the standby signal is activated and deactivated synchronously to at least one clock signal transmitted to the initiator module and the wait signal is activated and deactivated synchronously to the at least one clock signal transmitted to the initiator module.

5. The apparatus of claim 1, wherein the initiator module deactivates the standby signal asynchronously to at least one clock signal from the control module.

6. The apparatus of claim 1, wherein the initiator module is configurable to support a forced standby mode to be used if processing in the initiator module is not enabled and the standby signal is activated.

7. The apparatus of claim 1, wherein the initiator module is configurable to support a no standby mode to prevent activation of the standby signal.

8. The apparatus of claim 1, further comprising:

a target module with a power input coupled to the power output of the control module and a clock input coupled to the clock output of the control module; and

an interconnect module coupled between the initiator module and the target module, said interconnect module having a power input coupled to the power output of the control module and a clock input coupled to the clock output of the control module.

9. The apparatus of claim 8, wherein the interconnect module is capable of transmitting information between the initiator module and the target module.

10. The apparatus of claim 8, wherein the initiator module is capable of generating read and write requests to the target module.

11. The apparatus of claim 8, wherein the control module is configured to reduce power and at least one clock signal to the initiator module, the interconnect module, and the target module when the initiator module is in standby mode.

12. The apparatus of claim 11, wherein the control module is configured to deactivate the wait signal after the power and the at least one clock signal to the initiator module, the interconnect module, and the target module have been returned to normal operating levels.

13. A method for managing power in an electronic device, the method comprising:

automatically detecting, at an initiator module in an electronic device, an idle condition of the initiator module;

in response to detecting the idle condition, (a) automatically transitioning the initiator module from a normal state to a state of reduced communications and (b) automatically activating a standby signal of the initiator module;

detecting the standby signal at a control module in the electronic device;

in response to detecting the standby signal at the control module, automatically activating a wait signal of the control module;

detecting the wait signal at the initiator module;

after detecting the wait signal at the initiator module, detecting a wakeup event at the initiator module;

in response to detecting the wakeup event at the initiator module, deactivating the standby signal of the initiator module;

detecting, at the control module, that the standby signal has been deactivated;

in response to detecting at the control module that the standby signal has been deactivated, deactivating the wait signal of the control module;

detecting, at the initiator module, that the wait signal has been deactivated; and

in response to detecting at the initiator module that the wait signal has been deactivated, automatically transitioning the initiator module from the state of reduced communications to the normal state;

wherein the initiator module is allowed to communicate with the control module and with modules other than the control module when the initiator module is in the normal state; and

wherein the initiator module is not allowed to communicate with modules other than the control module when the initiator module is in the state of reduced communications.

14. A method according to claim 13, further comprising:

detecting the wakeup event at the initiator module before detecting the wait signal at the initiator module; and

in response to detecting the wakeup event at the initiator module before detecting the wait signal at the initiator module, automatically waiting for a predetermined period and then automatically transitioning the initiator module from the state of reduced communications to the normal state.

15. A method according to claim 14, wherein the predetermined period for delay comprises at least one clock cycle.

16. A method according to claim 13, wherein the operation of detecting the wakeup event at the initiator module comprises detecting at least one of the following:

an interrupt signal; and

a need to communicate with a module other than the control module.

17. A method according to claim 16, wherein the interrupt signal comprises a direct memory access (DMA) request.

18. A method according to claim 13, further comprising:

in response to detecting the standby signal at the control module, automatically reducing power supplied to the initiator module.

19. A method according to claim 13, further comprising:

in response to detecting the standby signal at the control module, automatically reducing a clock signal supplied to the initiator module.

20. A method according to claim 13, further comprising:

in response to detecting the standby signal at the control module, automatically deactivating a clock signal supplied to the initiator module.

21. A method according to claim 13, wherein:

the electronic device comprises a target module that is readable by the initiator module in the normal state; and

the method further comprises;

in response to detecting the standby signal at the control module, automatically reducing power consumed by the target module.

22. A method according to claim 21, further comprising:

in response to detecting the standby signal at the control module, automatically reducing power consumed by an interconnect module coupled between the initiator module and the target module.

23. An apparatus, comprising:

a control module;

an initiator module coupled to the control module, wherein the initiator module is configured to transmit a standby signal to the control module;

wherein the control module is configured to transmit a wait signal to the initiator module;

wherein the initiator module is configurable to enter a standby mode after the control module activates the wait signal to the initiator module; and

wherein the initiator module is configurable to enter a forced standby mode if processing in the initiator module is not enabled and the standby signal is activated.