Method for making a semiconductor device including shallow trench isolation (STI) regions with maskless superlattice deposition following STI formation and related structures
First Claim
1. A semiconductor device comprising:
- a semiconductor substrate having a surface;
a shallow trench isolation (STI) region in said semiconductor substrate and extending above the surface thereof;
a superlattice layer adjacent the surface of said semiconductor substrate and comprising a plurality of stacked groups of layers;
each group of layers of said superlattice layer comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions, and wherein at least some atoms from opposing base semiconductor portions are chemically bound together with the chemical bonds traversing the at least one intervening non-semiconductor monolayer; and
a lateral spacer between said superlattice layer and said STI region and comprising a lower non-monocrystalline semiconductor superlattice portion and an upper dielectric portion.
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Accused Products
Abstract
A semiconductor device may include a semiconductor substrate having a surface, a shallow trench isolation (STI) region in the semiconductor substrate and extending above the surface thereof, and a superlattice layer adjacent the surface of the semiconductor substrate and comprising a plurality of stacked groups of layers. More particularly, each group of layers of the superlattice layer may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Moreover, at least some atoms from opposing base semiconductor portions may be chemically bound together with the chemical bonds traversing the at least one intervening non-semiconductor monolayer. The semiconductor device may further include a lateral spacer between the superlattice layer and the STI region and which may include a lower non-monocrystalline semiconductor superlattice portion and an upper dielectric portion.
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Citations
23 Claims
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1. A semiconductor device comprising:
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a semiconductor substrate having a surface; a shallow trench isolation (STI) region in said semiconductor substrate and extending above the surface thereof; a superlattice layer adjacent the surface of said semiconductor substrate and comprising a plurality of stacked groups of layers; each group of layers of said superlattice layer comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions, and wherein at least some atoms from opposing base semiconductor portions are chemically bound together with the chemical bonds traversing the at least one intervening non-semiconductor monolayer; and a lateral spacer between said superlattice layer and said STI region and comprising a lower non-monocrystalline semiconductor superlattice portion and an upper dielectric portion. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method of making a semiconductor device comprising:
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forming a shallow trench isolation (STI) region in a semiconductor substrate and extending above a surface thereof; forming a superlattice layer adjacent the surface of the semiconductor substrate and comprising a plurality of stacked groups of layers; each group of layers of the superlattice layer comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions, and wherein at least some atoms from opposing base semiconductor portions are chemically bound together with the chemical bonds traversing the at least one intervening non-semiconductor monolayer; and forming a lateral spacer between the superlattice layer and the STI region and comprising a lower non-monocrystalline semiconductor superlattice portion and an upper dielectric portion. - View Dependent Claims (11, 12, 13, 14, 15, 16)
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17. A method of making a semiconductor device comprising:
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forming a shallow trench isolation (STI) region in a semiconductor substrate and extending above a surface thereof; forming a superlattice layer adjacent the surface of the semiconductor substrate and the STI region without using a mask, the superlattice comprising a plurality of stacked groups of layers; each group of layers of the superlattice layer comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions, and wherein at least some atoms from opposing base semiconductor portions are chemically bound together with the chemical bonds traversing the at least one intervening non-semiconductor monolayer; and forming a lateral spacer between the superlattice layer and the STI region and comprising a lower non-monocrystalline semiconductor superlattice portion and an upper dielectric portion. - View Dependent Claims (18, 19, 20, 21, 22, 23)
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Specification