High-k/metal gate MOSFET with reduced parasitic capacitance
First Claim
1. A semiconductor structure comprisingat least one metal oxide semiconductor field effect transistor (MOSFET) located on a surface of a semiconductor substrate, said at least one MOSFET comprising a gate stack including, from bottom to top, a high-k gate dielectric and a metal-containing gate conductor, said metal-containing gate conductor having gate corners located at a base segment of the metal-containing gate conductor, wherein said metal-containing gate conductor has vertical sidewalls devoid of said high-k gate dielectric except at said gate corners;
- a gate dielectric laterally abutting said high-k gate dielectric present at said gate corners; and
a gate spacer laterally abutting said metal-containing gate conductor and located upon an upper surface of both the gate dielectric and the high-k gate dielectric that is present at the gate corners.
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Accused Products
Abstract
The present invention provides a high-k gate dielectric/metal gate MOSFET that has a reduced parasitic capacitance. The inventive structure includes at least one metal oxide semiconductor field effect transistor (MOSFET) 100 located on a surface of a semiconductor substrate 12. The least one MOSFET 100 includes a gate stack including, from bottom to top, a high-k gate dielectric 28 and a metal-containing gate conductor 30. The metal-containing gate conductor 30 has gate corners 31 located at a base segment of the metal-containing gate conductor. Moreover, the metal-containing gate conductor 30 has vertically sidewalls 102A and 102B devoid of the high-k gate dielectric 28 except at the gate corners 31. A gate dielectric 18 laterally abuts the high-k gate dielectric 28 present at the gate corners 31 and a gate spacer 36 laterally abuts the metal-containing gate conductor 30. The gate spacer 36 is located upon an upper surface of both the gate dielectric 18 and the high-k gate dielectric that is present at the gate corners 31.
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Citations
24 Claims
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1. A semiconductor structure comprising
at least one metal oxide semiconductor field effect transistor (MOSFET) located on a surface of a semiconductor substrate, said at least one MOSFET comprising a gate stack including, from bottom to top, a high-k gate dielectric and a metal-containing gate conductor, said metal-containing gate conductor having gate corners located at a base segment of the metal-containing gate conductor, wherein said metal-containing gate conductor has vertical sidewalls devoid of said high-k gate dielectric except at said gate corners; -
a gate dielectric laterally abutting said high-k gate dielectric present at said gate corners; and a gate spacer laterally abutting said metal-containing gate conductor and located upon an upper surface of both the gate dielectric and the high-k gate dielectric that is present at the gate corners. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A semiconductor structure comprising
at least one metal oxide semiconductor field effect transistor (MOSFET) located on a surface of a semiconductor substrate, said at least one MOSFET comprising a gate stack including, from bottom to top, a high-k gate dielectric and a metal-containing gate conductor, said metal-containing gate conductor having gate corners located at a base segment of the metal-containing gate conductor, wherein said metal-containing gate conductor has vertical sidewalls devoid of said high-k gate dielectric except at said gate corners, said high-k gate dielectric at said gate corners has increased bonding as compared to said high-k gate dielectric that is located directly beneath said metal-containing gate conductor; -
a gate dielectric laterally abutting said high-k gate dielectric present at said gate corners; and a gate spacer laterally abutting said metal-containing gate conductor and located upon an upper surface of both the gate dielectric and the high-k gate dielectric that is present at the gate corners. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17)
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18. A semiconductor structure comprising:
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at least one metal oxide semiconductor field effect transistor (MOSFET) located on a surface of a semiconductor substrate, said at least one MOSFET comprising a gate stack including, from bottom to top, a high-k gate dielectric and a metal-containing gate conductor, said metal-containing gate conductor having gate corners located at a base segment of the metal-containing gate conductor, wherein said metal-containing gate conductor has vertical sidewalls devoid of said high-k gate dielectric except at said gate corners; a gate dielectric laterally abutting said high-k gate dielectric present at said gate corners; and a low-k gate spacer that includes voids in the interior thereof laterally abutting said metal-containing gate conductor and located upon an upper surface of both the gate dielectric and the high-k gate dielectric that is present at the gate corners. - View Dependent Claims (19, 20, 21, 22, 23, 24)
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Specification