PCI express switch with backwards compatibility
DCFirst Claim
Patent Images
1. A switch comprising:
- a plurality of physical interfaces for interfacing to corresponding devices, the interfaces having a respective configurable status and a respective address domain, wherein in a first status the interface is transparent, and in a second status the interface is non-transparent;
logic for setting the status of the physical interfaces as transparent or non-transparent;
logic for switching data units between the physical interfaces using mapped address I/O, including masking the address domain for the interfaces configured as non-transparent.
9 Assignments
Litigations
0 Petitions
Accused Products
Abstract
There are disclosed apparatus and methods for switching. Transparent and non-transparent ports are provided. Data units are transferred between the transparent ports, between the transparent and non-transparent ports, and between the non-transparent ports.
70 Citations
20 Claims
-
1. A switch comprising:
-
a plurality of physical interfaces for interfacing to corresponding devices, the interfaces having a respective configurable status and a respective address domain, wherein in a first status the interface is transparent, and in a second status the interface is non-transparent; logic for setting the status of the physical interfaces as transparent or non-transparent; logic for switching data units between the physical interfaces using mapped address I/O, including masking the address domain for the interfaces configured as non-transparent. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
-
-
9. A system comprising:
-
a switch comprising; a plurality of physical interfaces for interfacing to corresponding devices, the interfaces having a respective configurable status and a respective address domain, wherein in a first status the interface is transparent, and in a second status the interface is non-transparent, logic for setting the status of the physical interfaces as transparent or non-transparent, and logic for switching data units between the physical interfaces using mapped address I/O, including masking the address domain for the interfaces configured as non-transparent; a host processor connected to a first of the physical interfaces and having a first address domain; a first device connected to a second of the physical interfaces and having the first address domain; and a second device connected to a third of the physical interfaces and having a second address domain isolated from the first address domain; wherein the host processor, the first device and the second device can communicate with each other through the switch, and the switch masks the second address domain.
-
-
10. A PCI Express device comprising:
-
a first transparent port comprising a first physical interface for interfacing to a first device having a first address in a first shared address domain; a second transparent port comprising a second physical interface for interfacing to a second device having a second address in the first shared address domain; a third port comprising a third physical interface configurable to be transparent or non-transparent, wherein the third port when configured as transparent is for interfacing to a third device having a third address in the first shared address domain, the third port when configured as non-transparent is for interfacing to a fourth device having a fourth address in a second address domain, wherein the second address domain is isolated from the first address domain; logic for routing data units between the first transparent port, the second transparent port and the third port in accordance with a PCI Express interconnect standard. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
-
Specification