Printhead integrated circuit with low drive transistor to nozzle area ratio
First Claim
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1. A printhead integrated circuit comprising:
- a wafer substrate with a fluid ejection surface;
an array of drop ejectors formed on the fluid ejection surface of the wafer substrate, each drop ejector having;
a nozzle through which the drops are ejected;
an actuator for ejecting drops through the nozzle; and
,a drive transistor for energizing the actuator with a drive pulse;
wherein,the area of the drive transistor projected onto the fluid ejection surface is less than 37 times the area of the nozzle.
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Abstract
A inkjet printhead integrated circuit that has a wafer substrate with a fluid ejection surface, and an array of drop ejectors for ejecting drops of printing fluid onto a media substrate, the array being formed on the fluid ejection surface of the wafer substrate. Each drop ejector has a nozzle through which the drops are ejected, an actuator for ejecting drops through the nozzle and, a drive transistor for energizing the actuator with a drive pulse. The area of the drive transistor projected onto the fluid ejection surface is less than 37 times the area of the nozzle.
32 Citations
17 Claims
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1. A printhead integrated circuit comprising:
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a wafer substrate with a fluid ejection surface; an array of drop ejectors formed on the fluid ejection surface of the wafer substrate, each drop ejector having; a nozzle through which the drops are ejected; an actuator for ejecting drops through the nozzle; and
,a drive transistor for energizing the actuator with a drive pulse;
wherein,the area of the drive transistor projected onto the fluid ejection surface is less than 37 times the area of the nozzle. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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Specification