Trenched MOSFET device with trenched contacts

• US 7,816,729 B2
• Filed: 09/10/2006
• Issued: 10/19/2010
• Est. Priority Date: 08/08/2006
• Status: Expired due to Fees

• Current Assignee: Force Technology
• Original Assignee: Force Technology
• Inventors: Hshieh, Fwu-Iuan
• Primary Examiner(s): Lee; Eugene
• Assistant Examiner(s): Gumedzoe; Peniel M
• Application Number:
  US11/518,729
• Publication Number:
  US 20080035988A1
• Time in Patent Office: 1,500 Days
• Field of Search: 257/341, 257/401, 257/330, 257/E29.121, 257/E29.027, 257/E29.028, 257/328, 257/329
• US Class Current: 257/330
• CPC Class Codes: H01L 29/402 Field plates
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/42372 characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out H01L29/42324 takes precedence
• CPC Class Codes: H01L 29/42376 characterised by the length or the sectional shape
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/456 on silicon
• CPC Class Codes: H01L 29/4941 with a barrier layer between the silicon and the metal or metal silicide upper layer, e.g. Silicide/TiN/Polysilicon
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A trenched semiconductor power device that includes a trenched gate disposed in an extended continuous trench surrounding a plurality of transistor cells in an active cell area and extending as trench-gate fingers to intersect with a trenched gate under the gate metal runner at a termination area. At least one of the trench-gate fingers intersects with the trenched gate under the gate metal runner near the termination area having trench intersection regions vulnerable to have a polysilicon void and seam developed therein. At least a gate contact trench opened through an insulation layer covering the semiconductor power device wherein the gate contact trench penetrating from the insulation layer and extending into the gate polysilicon and the gate contact trench is opened in an area away from the trench intersection regions and also away from a center portion of said the trenched gate underneath said gate runner metal where a polysilicon void or a seam is likely formed thus avoid the formation of the vulnerable spots.

Claims

1. A trenched semiconductor power device comprising a plurality of trenched gates disposed in an extended continuous trench surrounding a plurality of transistor cells in an active cell area and extending as trench-gate fingers to directly connect with a plurality of wider trenched gates underneath a gate runner metal wherein said trenched semiconductor power device further comprising:

at least a gate contact trench opened through an insulation layer covering the semiconductor power device wherein said gate contact trench penetrating through the insulation layer and extending into a trench-filling material in said wider trenched gate wherein said wider trenched gates are opened substantially as rectangular-shaped or square-shaped trenched gates having a plurality of corners and said gate contact trench is located closest to one of the corners relative to all other of the corners of the wider trenched gates.

2. The trenched semiconductor power device of claim 1 wherein:

gate contact trench is disposed closest to the corner of said wider trenched gate diagonally opposite from an intersection between said trench-gate finger and said wider trenched gate.

3. The trenched semiconductor power device of claim 1 wherein:

said wider trenched gate connecting to an end of the trench finger forming a T-shaped trench intersection wherein said gate contact trench is disposed closest to the corner of said wider trenched gate opposite an intersection between said trench-gate finger and said wider trenched gate.

5. The trenched semiconductor power device of claim 1 wherein:

said gate contact trench is filled with a tungsten gate contact plug surrounded with a Ti/TiN barrier layer.

6. The trenched semiconductor power device of claim 1 further comprises a MOSFET device and said MOSFET device further comprising:

a plurality of source body contact trenches opened through said insulation layer and filled with metal plugs therein.

10. The trenched semiconductor power device of claim 1 wherein:

said source and gate contact trench is filled with an Aluminum alloy surrounded with a Ti/TiN barrier layer.

11. The trenched semiconductor power device of claim 1 wherein:

said wider trenched gate underneath gate runner metal is configured as an open stripe extending from and intersecting to said trench-gate fingers as an L-shaped trenched gate underneath gate runner metal with said width of gate contact trench is smaller than half of a width of said wider trench-gate.

12. The trenched semiconductor power device of claim 1 wherein:

said wider trenched gate underneath gate runner metal is configured as an open stripe extending from and intersecting to said trench-gate fingers as an expanded square-shaped trenched gate underneath gate runner metal with said width of gate contact trench is smaller than half of a width of said wider trench-gate.

13. The trenched semiconductor power device of claim 1 wherein:

said wider trenched gate underneath gate runner metal is configured as an open stripe extending from and intersecting to said trench-gate fingers as an expanded rectangular-shaped trenched gate underneath gate runner metal with said width of gate contact trench is smaller than half of a width of said wider trench-gate.

14. The trenched semiconductor power device of claim 1 wherein:

said wider trenched gate underneath gate runner metal is configured as an open stripe extending from and intersecting to said trench-gate fingers as an expanded circular trenched gate underneath gate runner metal with said width of gate contact trench is smaller than half of a diameter of said wider trench-gate.

15. The trenched semiconductor power device of claim 1 wherein:

said trenched gate underneath gate runner metal is configured as a no-open-end trenched gate underneath gate runner metal perpendicularly intersecting to said trench-gate fingers from active area. The width of gate contact trench is smaller than half of a width of said wider trench-gate.

16. The trenched semiconductor power device of claim 1 wherein:

said trenched gate underneath gate runner metal is configured as an open stripe extending from and having a greater width than said trench-gate fingers wherein said open stripe allowing a body-dopant region disposed adjacent to a source region of said semiconductor power device connecting to another body dopant region underneath a gate runner metal whereby said gate runner metal can function as a field plate.

17. The trenched semiconductor power device of claim 1 wherein:

said trenched gate underneath gate runner metal is configured as an open stripe extending from and intersecting to said trench-gate fingers as an L-shaped trenched gate underneath gate runner metal having a greater width than said trench-gate fingers wherein said L-shaped open trenched gate underneath gate runner metal allowing a body region disposed adjacent to a source region of said semiconductor power device connecting to another body dopant region underneath a gate runner metal whereby said gate runner metal can function as a field plate.

18. The trenched semiconductor power device of claim 1 wherein:

said gate contact trench is filled with a contact plug composed of an aluminum alloy surrounded with a Ti/TiN barrier layer.

4. A trenched semiconductor power device comprising a plurality of trenched gates disposed in an extended continuous trench surrounding a plurality of transistor cells in an active cell area and extending as trench-gate fingers to directly connect with a plurality of wider trenched gates underneath a gate runner metal wherein said trenched semiconductor power device further comprising:

at least a gate contact trench is opened through an insulation layer covering the semiconductor power device wherein said gate contact trench penetrates through the insulation layer and extends into a trench-filling material in said wider trenched gate underneath said gate runner metal, wherein at least one of said wider gate trenches is opened substantially as a polygon-shaped trench having multiple corners and wherein at least one of said gate contact trenches is disposed closest to one of said corners relative to all other corners of said wider trenched gate constituting an off-center and unsymmetrical trenched gate contact relative to the corners of said wider trenched gate.

7. The trenched semiconductor power device of claim 4 further comprising

a plurality of source body contact trenches opened through said insulation layer and filled with a metal plug therein.

8. The trenched semiconductor power device of claim 4 further comprising:

said gate contact trench disposed closest to one of the corners of said wider trenched gate is disposed at a greatest distance from an intersection between said trench-gate finger and said wider trenched gate.

9. The trenched semiconductor power device of claim 4 wherein:

said gate contact trench is filled with a tungsten gate contact plug surrounded with a Ti/TiN barrier layer.