Random access electrically programmable e-fuse ROM

• US 7,817,455 B2
• Filed: 08/30/2006
• Issued: 10/19/2010
• Est. Priority Date: 08/31/2005
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Leslie, Alan J., Fredeman, Gregory J., Kirihata, Toshiaki, Safran, John M.
• Primary Examiner(s): AUDUONG, GENE NGHIA
• Application Number:
  US12/065,202
• Publication Number:
  US 20080316789A1
• Time in Patent Office: 1,511 Days
• Field of Search: 365/96, 365/189.07, 365/189.09, 365/207, 365/225.7, 365/210.12, 365/201, 327525-527
• US Class Current: 365/96
• CPC Class Codes: G11C 17/16 using electrically-fusible links
• CPC Class Codes: G11C 17/165 Memory cells which are electrically programmed to cause a change in resistance, e.g. to permit multiple resistance steps to be programmed rather than conduct to or from non-conduct change of fuses and antifuses digital stores using resistance random access memory elements G11C13/0002
• CPC Class Codes: G11C 29/027 in fuses

Abstract

A one-time-programmable-read-only-memory (OTPROM) is implemented in a two-dimensional array of aggressively scaled suicide migratable e-fuses. Word line selection is performed by decoding logic operating at V_DD while the bit line drive is switched between V_DD and a higher voltage, V_p, for programming. The OTPROM is thus compatible with and can be integrated with other technologies without a cost adder and supports optimization of the high current path for minimal voltage drop during fuse programming. A differential sense amplifier with a programmable reference is used for improved sense margins and can support an entire bit line rather than sense amplifiers being provided for individual fuses.

Claims

1. A programmable device comprising

a plurality of cells, each cell having a long dimension and a short dimension, each said cell comprising

an e-fuse, and

a transistor in series with said e-fuse and having a control electrode connected to a word line and a conduction path connected to a sense line, said transistor and said e-fuse having their long dimensions substantially aligned with a long dimension of said cell and said word line located substantially parallel to said long dimension of said cell,

a bit line crossing a short dimension of at least two of said plurality of cells, and

a sense amplifier connected to said bit line.

2. A programmable device as recited in claim 1, wherein said e-f use has an unprogrammed resistance of less than 180 Ω

, a first terminal having a length corresponding to a width of a said bit line and a second terminal having a geometry for concentrating current flux density.

3. A programmable device as recited in claim 2, wherein said sense amplifier includes a reference voltage source.

4. A programmable device as recited in claim 2, wherein said reference voltage source comprises a network including a plurality of e-fuses.

5. A programmable device as recited in claim 4, wherein said reference voltage source comprises two e-fuses connected in series.

6. A programmable device as recited in claim 4, wherein said reference voltage source comprises a resistance.

7. A programmable device as recited in claim 6, wherein said resistance approximates a logarithmic mid-point of resistance between a programmed e-fuse resistance and an unprogrammed e-fuse resistance.

8. A programmable device as recited in claim 7, further comprising

means for adjusting said resistance.

9. A programmable device as recited in claim 8, wherein said means for adjusting said resistance includes a transistor having an adjustable voltage applied thereto.

10. A programmable device as recited in claim 3, further including a power source for selectively programming said e-fuse.

11. A programmable device as recited in claim 10, wherein said power source comprises a charge pump.

12. A programmable device as recited in claim 3, further comprising a selection circuit connected to said bit line.

13. A programmable device as recited in claim 12, wherein said selection circuit comprises a level shifter.

14. A programmable device as recited in claim 13, wherein said selection circuit includes means for grounding deselected bit lines.

15. A programmable device as recited in claim 1, wherein said sense amplifier includes a reference voltage source.

16. A programmable device as recited in claim 15, wherein said reference voltages source comprises a network including a plurality of e-fuses.

17. A programmable device as recited in claim 15, wherein said reference voltage source comprises two e-fuses connected in series.

18. A programmable device as recited in claim 15, wherein said reference voltage source comprises a resistance.

19. A programmable device as recited in claim 18, wherein said resistance approximates a logarithmic mid-point of resistance between a programmed e-fuse resistance and an unprogrammed e-fuse resistance.

20. A programmable device as recited in claim 18, further comprising

means for adjusting said resistance.

21. A programmable device as recited in claim 20, wherein said means for adjusting said resistance includes a transistor having an adjustable voltage applied thereto.

22. A programmable device as recited in claim 15, further including a power source for selectively programming said e-fuse.

23. A programmable device as recited in claim 22, wherein said power source comprises a charge pump.

24. A programmable device as recited in claim 14, further comprising a selection circuit connected to said bit line.

25. A programmable device as recited in claim 24, wherein said selection circuit comprises a level shifter.

26. A programmable device as recited in claim 25, wherein said selection circuit includes means for grounding deselected bit lines.

27. A programmable device as recited in claim 1, wherein said bit lines exhibit lower resistance than said word lines.

28. An e-fuse for an integrated circuit comprising

a first terminal having a length corresponding to a width of a conductor connected thereto, and

a second terminal having a geometry for concentrating current flux density,

said e-fuse having an unprogrammed resistance of less than 180Ω

.

29. An e-fuse as recited in claim 28 having a fuse element comprising a silicide.

30. An e-fuse as recited in claim 28 wherein said silicide is nickel silicide.

31. A programmable device comprising

a semiconductor chip,

a two-dimensional array of memory cells, each memory cell comprising an e-fuse connected to a bit line and a transistor connected in series with said e-fuse and having a control electrode of said transistor connected to a word line,

a decoder for selectively applying a first voltage to said word line,

a selector for selectively applying one of said first voltage and a second voltage to said bit line, said second voltage being greater than said first voltage, and

a source of said second voltage,

wherein said two-dimensional array of memory cells, said decoder, said selector and said source of said second voltage are formed on said semiconductor chip.

32. A programmable device as recited in claim 31, wherein said selector includes means for connecting a deselected bit line to a reference voltage.

33. A method for programming an e-fuse having a transistor in series therewith, said method comprising steps of

applying a programming voltage to said e-fuse,

controlling conduction of said transistor with a voltage less than said programming voltage

whereby said transistor initially conducts in a saturation mode and, in a linear mode, applies a voltage across said e-fuse following programming of said e-fuse.

34. A method as recited in claim 33 wherein said step of applying a voltage following programming of said e-fuse includes applying an increased voltage to said e-fuse after said transistor initially conducts in a saturation mode.

35. A method as recited in claim 33 including the further step of sensing a programmed or unprogrammed state of said e-fuse using a reduced voltage during manufacturing.