Manufacturing method, remanufacturing method and reshipping method for a semiconductor memory device

• US 7,817,477 B2
• Filed: 03/05/2008
• Issued: 10/19/2010
• Est. Priority Date: 03/30/2007
• Status: Expired due to Fees

• Current Assignee: LAPIS Semiconductor Co., Ltd. (ROHM Co., Ltd.)
• Original Assignee: Oki Semiconductor Company Limited (ROHM Co., Ltd.)
• Inventors: Fujii, Narihisa
• Primary Examiner(s): Pham; Ly D
• Application Number:
  US12/042,591
• Publication Number:
  US 20080241968A1
• Time in Patent Office: 958 Days
• Field of Search: 365/185.29, 438/522
• US Class Current: 365/185.29
• CPC Class Codes: H01L 29/40117 the electrodes comprising a charge-trapping insulator

Abstract

A manufacturing method, remanufacturing method and reshipping method for a semiconductor memory device capable of preventing the charge hold characteristic from deteriorating even if information data is repeatedly written and erased. The manufacturing method is for a semiconductor memory device having a plurality of memory cells in an FET structure formed on a semiconductor substrate, wherein each of the plurality of memory cells is to store a unit bit and hold information data. Preparing a plurality of memory cells, bits of the information data are written to the memory cells. After writing the information data bits to the memory cells, the memory cells are allowed to stand at a predetermined ambient temperature for a predetermined time. Thereafter, bits of the information data are written to the memory cells.

Claims

1. A method of manufacturing a semiconductor memory device having a plurality of memory cells in an FET structure formed on a semiconductor substrate, each of the plurality of memory cells being to store a unit bit and hold information data, the method comprising:

a preparing step that prepares the plurality of memory cells;

a writing step that writes bits of the information data to the memory cells;

a baking step that allows the memory cells to stand at a predetermined ambient temperature for a predetermined time after the writing step; and

a rewriting step that writes bits of the information data to the memory cells after the baking step;

wherein the semiconductor memory device, before written with the information data to the memory cells, is processed with a step of electrical erasing data being held by the memory cell and a step of neutralization baking of allowing the semiconductor memory device to stand at a first ambient temperature for a first time, the predetermined ambient temperature in the baking step being lower than the first ambient temperature in the neutralization baking step.

2. A method of remanufacturing a semiconductor memory device having a plurality of memory cells in an FET structure formed on a semiconductor substrate, each of the plurality of memory cells being to store a unit bit and hold information data, the method comprising:

an erasing step that erases written information data already written on the memory cells;

a writing step that writes bits of new information data to the memory cells after the erasing step;

a baking step that allows the memory cells to stand at a predetermined ambient temperature for a predetermined time after the writing step; and

a rewriting step that writes bits of the new information data to the memory cells after the baking step;

wherein the semiconductor memory device, before written with the information data to the memory cells, is processed with a step of electrical erasing data being held by the memory cell and a step of neutralization baking of allowing the semiconductor memory device to stand at a first ambient temperature for a first time, the predetermined ambient temperature in the baking step being lower than the first ambient temperature in the neutralization baking step.

3. A method of reshipping a semiconductor memory device having a plurality of memory cells in an FET structure formed on a semiconductor substrate, each of the plurality of memory cells being to store a unit bit and hold information data, the method comprising:

a step of forming the plurality of memory cells on a semiconductor wafer;

a step of breaking the plurality of semiconductor memory devices constituted by the plurality of memory cells into individual pieces;

a step of packaging the plurality of semiconductor memory devices thus divided;

a first writing step of writing first data based on a data write request from a customer, to the memory cells of the semiconductor memory device thus packaged;

a step of shipping the semiconductor memory device to the customer;

a step of receiving the semiconductor memory device written with the first data from the customer;

a step of erasing the first data written in the semiconductor memory device;

a second writing step of writing second data based on a data rewriting request from the customer, to the semiconductor memory device;

a baking step of allowing the semiconductor memory device to stand at a predetermined ambient temperature for a predetermined time after the second writing step;

a third writing step of writing the second data to the memory cells of the semiconductor memory device after the baking step; and

a reshipping step of shipping again the semiconductor memory device written with the second data to the customer;

wherein the semiconductor memory device, before written with the first data to the memory cells, is processed with a step of electrical erasing data being held by the memory cell and a step of neutralization baking of allowing the semiconductor memory device to stand at a first ambient temperature for a first time, the predetermined ambient temperature in the baking step being lower than the first ambient temperature in the neutralization baking step.