Integrating data from symmetric and asymmetric memory

• US 7,818,489 B2
• Filed: 11/05/2007
• Issued: 10/19/2010
• Est. Priority Date: 11/04/2006
• Status: Active Grant

• Current Assignee: Western Digital Technologies Incorporated (Western Digital Corporation)
• Original Assignee: Virident Systems Inc. (Western Digital Corporation)
• Inventors: Karamcheti, Vijay, Parekh, Rajesh, Singhai, Ashish, Okin, Kenneth A., Ganapathy, Kumar
• Primary Examiner(s): Elmore; Reba I
• Application Number:
  US11/935,275
• Publication Number:
  US 20080177978A1
• Time in Patent Office: 1,079 Days
• Field of Search: 711/101, 711/103, 711/146, 711/170
• US Class Current: 711/101
• CPC Class Codes: G06F 12/0207 with multidimensional access, e.g. row/column, matrix
• CPC Class Codes: G06F 12/0223 User address space allocation, e.g. contiguous or non contiguous base addressing
• CPC Class Codes: G06F 12/0292 using tables or multilevel address translation means G06F12/023 takes precedence; address translation in virtual memory systems G06F12/10
• CPC Class Codes: G06F 12/08 in hierarchically structured memory systems, e.g. virtual memory systems
• CPC Class Codes: G06F 12/10 Address translation
• CPC Class Codes: G06F 12/1009 using page tables, e.g. page table structures
• CPC Class Codes: G06F 12/121 using replacement algorithms
• CPC Class Codes: G06F 12/1475 in a virtual system, e.g. with translation means
• CPC Class Codes: G06F 13/1657 Access to multiple memories
• CPC Class Codes: G06F 13/1694 Configuration of memory controller to different memory types
• CPC Class Codes: G06F 2212/205 Hybrid memory, e.g. using both volatile and non-volatile memory
• CPC Class Codes: G06F 2212/657 Virtual address space management
• CPC Class Codes: G06F 3/0604 Improving or facilitating administration, e.g. storage management
• CPC Class Codes: G06F 3/0628 making use of a particular technique
• CPC Class Codes: G06F 3/0638 Organizing or formatting or addressing of data
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0646 Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
• CPC Class Codes: G06F 3/0647 Migration mechanisms
• CPC Class Codes: G06F 3/068 Hybrid storage device
• CPC Class Codes: G06F 3/0685 Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays
• CPC Class Codes: G06F 9/5016 : the resource being the memory
• CPC Class Codes: Y02D 10/00 : Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Data stored within symmetric and asymmetric memory components of main memory is integrated by identifying a first data as having access characteristics suitable for storing in an asymmetric memory component. The first data is included among a collection of data to be written to the asymmetric memory component. An amount of data is identified within the collection of data to be written to the asymmetric memory component. The amount of data is compared within the collection of data to a volume threshold to determine whether a block write to the asymmetric memory component is justified by the amount of data. If justified, the collection of data is loaded to the asymmetric memory component.

Claims

1. A method of integrating data stored within symmetric and asymmetric memory components of main memory and storing the resultant integrated data within at least one asymmetric memory component, where the symmetric memory components are each configured to enable random access write operations in which an address within a block of the symmetric memory component is written without affecting the availability of other addresses within the block of the symmetric memory component, and where the asymmetric memory components are each configured to enable block write operations in which a write to an address within a block of one of the asymmetric memory components affects the availability of other addresses within the block of the asymmetric memory component, the method comprising:

receiving a write command to write data to a virtual address associated with a first physical address of an asymmetric memory component of the main memory;

configuring a page table to change an association of the virtual address from the association to the first physical address of the asymmetric memory component of the main memory to a second physical address of a symmetric memory component of the main memory;

generating an indication that the first physical address is available for association with another virtual address in a subsequent block write operation;

identifying a collection of one or more content entries with access characteristics suitable for storage in the asymmetric memory component, the collection of content entries including data corresponding to the virtual address for which the association was changed from the first physical address of the asymmetric memory component of the main memory to the second physical address of the symmetric memory component of the main memory;

determining whether the collection of content entries collectively occupy a threshold amount of storage or whether a threshold period of time has elapsed since the association of the virtual address was changed from the first physical address of the asymmetric memory component of the main memory to the second physical address of the symmetric memory component of the main memory; and

in response to determining that the collection of content entries collectively occupy the threshold amount of storage or that the threshold period of time has elapsed;

identifying memory utilization characteristics of multiple regions included in the asymmetric memory component;

analyzing the identified memory utilization characteristics;

based on the analysis of the identified memory utilization characteristics, selecting, from among the multiple regions included in the asymmetric memory component, a region in the asymmetric memory component; and

loading the collection of content entries to the selected region of the asymmetric memory component using a block write command.

2. The method of claim 1 wherein loading the collection of content entries to the region of the asymmetric memory component includes loading the collection of content entries to a region of the asymmetric memory component that is associated with the first physical address using a block write command.

3. The method of claim 1 wherein the asymmetric memory component of main memory includes NOR flash and the symmetric memory component includes dynamic random access memory (DRAM) and further comprising:

receiving a write command to write data to virtual address associated with a first physical address that maps to the NOR flash memory;

configuring a page table to change an association of the virtual address from the association to the first physical address that maps to the NOR flash memory to a second physical address that maps to DRAM memory;

enabling association of the first physical address with another virtual address;

identifying a collection of content entries of content with access characteristics suitable for storage in the NOR flash memory;

determining whether the collection of content entries of content includes a threshold amount of storage; and

loading, in response to determining whether the collection of content entries of content requires the threshold amount of storage, the collection of content entries to the NOR flash using a block write command.

4. The method of claim 3 wherein loading, in response to determining whether the collection of content entries of content requires the threshold amount of storage, the collection of content entries to the NOR flash includes loading, in response to determining whether the collection of content entries of content requires the threshold amount of storage, the collection of content entries to the NOR flash that is proximate to the first physical address.

5. The method of claim 1 wherein identifying the collection of content entries includes organizing, in symmetric memory, an amount of data to be written corresponding to a size of a sector within a bank of NOR flash.

6. The method of claim 1 wherein identifying the collection of content entries includes organizing, in symmetric memory, an amount of data to be written corresponding to a size of multiple blocks within a disruption region of the asymmetric memory component in which a write to an address within a block of one of the asymmetric memory components affects the availability of other addresses within the disruption region of the asymmetric memory component.

7. The method of claim 6 wherein organizing the amount of data includes structuring each block to include more than a first threshold of data and less than a second threshold of data.

8. The method of claim 7 wherein structuring each block to include more than the first threshold of data and less than the second threshold of data includes structuring each block to include more than the first threshold of data and less than the second threshold of data in response to determining that a system is not constrained for memory resources.

9. The method of claim 6 further comprising structuring each block to support a sequential addition of data within the block.

10. The method of claim 6 wherein organizing the amount of data includes:

structuring a first block within the disruption region to include more than a first threshold of data;

in response to determining that a particular write instruction configured to load data to the first block exceeds the first threshold, identifying a second block of data; and

organizing additional data to be loaded to the second block of data.

11. The method of claim 6 wherein structuring the amount of block writes includes:

identifying a threshold amount of data for a disruption region;

organizing the threshold amount of data into a collection of block organizations;

configuring a memory controller to load the collection of block organizations into the disruption region.

12. The method of claim 6 wherein organizing the amount of data includes:

identifying virtual addresses that were previously mapped to asymmetric memory component and that now map to symmetric memory;

tracking the identified virtual addresses;

identifying candidates with access characteristics suitable for use in asymmetric memory component;

identifying a capacity threshold that indicates approximately a maximum amount of data that can be loaded to a memory structure that includes either a disruption region or a block;

organizing the candidates into a memory structure;

determining whether the identified candidates include a capacity threshold of data;

loading, in response to determining that the identified candidates include a capacity threshold of data, the identified candidates to the memory structure; and

accumulating, in response to determining that the identified candidates do not include a capacity threshold of data, additional candidates until a capacity threshold of data is available to load to the memory structure.

13. The method of claim 12 wherein identifying the capacity threshold includes identifying the capacity threshold in response to determining that a system is constrained for memory resources.

14. The method of claim 12 further comprising:

using a sequential add threshold that is different than the threshold amount of storage in response to determining that the collection of content entries can be added sequentially using the sequential write to the one or more blocks within the asymmetric memory component.

15. The method of claim 1 further comprising:

identifying a disruption region in the asymmetric memory component;

identifying one or more blocks within the disruption region;

determining that the one or more blocks within the disruption region do not need to replaced;

determining that the collection of content entries can be added sequentially using a sequential write to the one or more blocks within the asymmetric memory component; and

adding the collection of content entries to the disruption region using a sequential write.

16. The method of claim 1 wherein determining whether the collection of content entries collectively occupy the threshold amount of storage or whether the threshold period of time has elapsed includes specifying the threshold amount of storage based on a utilization level of the main memory.

17. The method of claim 16 wherein determining whether the collection of content entries collectively occupy the threshold amount of storage or whether the threshold period of time has elapsed includes specifying the threshold amount of storage in response to identifying a state for a component within the asymmetric memory component.

18. The method of claim 1 wherein determining whether the collection of content entries collectively occupy the threshold amount of storage or whether the threshold period of time has elapsed includes requiring that the collection of entries be written to the asymmetric memory component even if the collection of entries do not occupy the threshold amount of storage.

19. The method of claim 1 wherein determining whether the collection of content entries collectively occupy the threshold amount of storage or whether the threshold period of time has elapsed includes:

identifying an impact on disruption of read operations against data stored in the asymmetric memory component caused by loading the collection of entries to the asymmetric memory component; and

specifying the threshold amount of storage in response to identifying the impact.

20. The method of claim 1 wherein selecting, from among the multiple regions included in the asymmetric memory component, the region in the asymmetric memory component comprises:

determining which of the multiple regions minimizes an amount of data that is disrupted during the block write command based on the analysis of the identified memory utilization characteristics; and

based on the determination of which of the multiple regions minimizes the amount of data that is disrupted during the block write command, selecting, from among the multiple regions included in the asymmetric memory component, a region in the asymmetric memory component.

21. The method of claim 20 wherein:

identifying memory utilization characteristics of multiple regions included in the asymmetric memory component comprises identifying a present amount of memory utilization for each of multiple regions included in the asymmetric memory component;

analyzing the identified memory utilization characteristics comprises analyzing the present amount of memory utilization for each of multiple regions included in the asymmetric memory component; and

determining which of the multiple regions minimizes the amount of data that is disrupted during the block write command based on the analysis of the identified memory utilization characteristics comprises determining which of the multiple regions has a lowest amount of memory utilization based on the analysis of the present amount of memory utilization for each of the multiple regions included in the asymmetric memory component.

22. The method of claim 21 wherein determining which of the multiple regions has a lowest amount of memory utilization comprises determining which of the multiple regions has a lowest amount of memory population density.

23. The method of claim 1 further comprising identifying an amount of storage collectively occupied by the collection of content entries, wherein:

identifying memory utilization characteristics of multiple regions included in the asymmetric memory component comprises identifying a distribution of data within each of at least one of the multiple regions included in the asymmetric memory component;

analyzing the identified memory utilization characteristics comprises analyzing the identified amount of storage collectively occupied by the collection of content entries with respect to the identified distribution of data; and

selecting the region in the asymmetric memory component comprises;

determining whether the identified amount of storage collectively occupied by the collection of content entries fits within the identified distribution of data; and

selecting, from among the multiple regions included in the asymmetric memory component, a region in the asymmetric memory component based on the determination of whether the identified amount of storage collectively occupied by the collection of content entries fits within the identified distribution of data.

24. The method of claim 23 wherein:

identifying the distribution of data within at least one of the multiple regions included in the asymmetric memory component comprises identifying, within at least one of the multiple regions included in the asymmetric memory component, a sequential range of presently unused physical addresses in the asymmetric memory component that are surrounded by presently used physical addresses in the asymmetric memory component; and

determining whether the identified amount of storage collectively occupied by the collection of content entries fits within the identified distribution of data comprises;

determining a size of the sequential range of presently unused physical addresses within the at least one of the multiple regions included in the asymmetric memory component; and

based on the determination of the size of the sequential range of presently unused physical addresses, determining whether the identified amount of storage collectively occupied by the collection of content entries fits within the sequential range of presently unused physical addresses; and

selecting, from among the multiple regions included in the asymmetric memory component, the region in the asymmetric memory component based on the determination of whether the identified amount of storage collectively occupied by the collection of content entries fits within the identified distribution of data comprises selecting, from among the multiple regions included in the asymmetric memory component, a region in the asymmetric memory component based on the determination of whether the identified amount of storage collectively occupied by the collection of content entries fits within the sequential range of presently unused physical addresses.

25. The method of claim 23 wherein:

identifying the distribution of data within each of at least one of the multiple regions included in the asymmetric memory component comprises;

identifying, within a first of the multiple regions included in the asymmetric memory component, a first sequential range of presently unused physical addresses; and

identifying, within a second of the multiple regions included in the asymmetric memory component, a second sequential range of presently unused physical addresses;

determining whether the identified amount of storage collectively occupied by the collection of content entries fits within the identified distribution of data comprises;

determining a first size of the first sequential range of presently unused physical addresses;

determining a second size of the second sequential range of presently unused physical addresses, the second size being different than the first size;

determining that the first size is greater than or equal to the identified amount of storage collectively occupied by the collection of content entries;

determining that the second size is greater than or equal to the identified amount of storage collectively occupied by the collection of content entries; and

determining whether the identified amount of storage collectively occupied by the collection of content entries is closer in size to the first size or the second size; and

selecting the region in the asymmetric memory component comprises selecting a region in the asymmetric memory component based on the determination of whether the identified amount of storage collectively occupied by the collection of content entries is closer in size to the first size or the second size.

26. The method of claim 1 further comprising:

in response to determining that the collection of content entries collectively occupy the threshold amount of storage or that the threshold period of time has elapsed, determining application characteristics that reflect behaviors of at least one presently-active application,

wherein analyzing the identified memory utilization characteristics further comprises analyzing the determined application characteristics, and

wherein selecting, from among the multiple regions included in the asymmetric memory component, the region in the asymmetric memory component comprises selecting, from among the multiple regions included in the asymmetric memory component, the region in the asymmetric memory component based on the analysis of the identified memory utilization characteristics and the determined application characteristics.

27. The method of claim 26 wherein selecting, from among the multiple regions included in the asymmetric memory component, the region in the asymmetric memory component based on the analysis of the identified memory utilization characteristics and the determined application characteristics comprises:

determining which of the multiple regions has an impact on application performance resulting from the block write command that is less than a threshold of impact on application performance; and

based on the determination of which of the multiple regions has an impact on application performance resulting from the block write command that is less than the threshold of impact on application performance, selecting, from among the multiple regions included in the asymmetric memory component, a region in the asymmetric memory component that has an impact on application performance resulting from the block write command that is less than the threshold of impact on application performance.

28. The method of claim 26 wherein selecting, from among the multiple regions included in the asymmetric memory component, the region in the asymmetric memory component based on the analysis of the identified memory utilization characteristics and the determined application characteristics comprises:

determining which of the multiple regions has the least impact on application performance resulting from the block write command; and

based on the determination of which of the multiple regions minimizes has the least impact on application performance resulting from the block write command, selecting, from among the multiple regions included in the asymmetric memory component, a region in the asymmetric memory component.

29. The method of claim 28 wherein determining which of the multiple regions minimizes the impact on application performance resulting from the block write command comprises:

determining that the application characteristics indicate that an application is building a large data structure that requires a relatively high level of memory utilization; and

identifying a region in the asymmetric memory component for which the impact on application performance resulting from potential disruption of read operations during the block write command is less than the impact on application performance resulting from operating at less than a desired level of memory utilization caused by selecting another of the multiple regions that would have a lower impact on application performance resulting from potential disruption of read operations during the block write command.

30. The method of claim 1 wherein:

determining whether the collection of content entries collectively occupy a threshold amount of storage or whether a threshold period of time has elapsed since the association of the virtual address was changed from the first physical address of the asymmetric memory component of the main memory to the second physical address of the symmetric memory component of the main memory comprises determining whether a threshold period of time has elapsed since the association of the virtual address was changed from the first physical address of the asymmetric memory component of the main memory to the second physical address of the symmetric memory component of the main memory, and

loading the collection of content entries to the selected region of the asymmetric memory component using the block write command occurs in response to the determination that the threshold period of time has elapsed since the association of the virtual address was changed from the first physical address of the asymmetric memory component of the main memory to the second physical address of the symmetric memory component of the main memory.

31. The method of claim 1 wherein determining whether the collection of content entries collectively occupy a threshold amount of storage or whether a threshold period of time has elapsed since the association of the virtual address was changed from the first physical address of the asymmetric memory component of the main memory to the second physical address of the symmetric memory component of the main memory comprises determining whether the collection of content entries collectively occupy a threshold amount of storage that is determined based on an amount of time that has elapsed since the association of the virtual address was changed from the first physical address of the asymmetric memory component of the main memory to the second physical address of the symmetric memory component of the main memory, further comprising:

tracking an amount of time that has elapsed since the association of the virtual address was changed from the first physical address of the asymmetric memory component of the main memory to the second physical address of the symmetric memory component of the main memory;

identifying a first threshold amount of storage that corresponds to a first amount of time since the association of the virtual address was changed from the first physical address of the asymmetric memory component of the main memory to the second physical address of the symmetric memory component of the main memory;

based on the tracking, determining that the collection of content entries collectively occupy less than the first threshold amount of storage when the first amount of time since the association of the virtual address was changed from the first physical address of the asymmetric memory component of the main memory to the second physical address of the symmetric memory component of the main memory has elapsed; and

in response to the determination that the collection of content entries collectively occupy less than the first threshold amount of storage when the first amount of time since the association of the virtual address was changed from the first physical address of the asymmetric memory component of the main memory to the second physical address of the symmetric memory component of the main memory has elapsed;

lowering the first threshold amount of storage to a second threshold amount of storage; and

using the second threshold amount of storage to determine whether the collection of content entries collectively occupy the threshold amount of storage after the first amount of time has elapsed.

32. The method of claim 1 wherein loading the collection of content entries to the selected region of the asymmetric memory component using the block write command comprises:

loading data corresponding to the virtual address for which the association was changed back to the asymmetric memory component; and

configuring the page table to change the association of the virtual address from the association to the second physical address of the symmetric memory component of the main memory to a third physical address of the asymmetric memory component of the main memory.

33. The method of claim 1 further comprising:

tracking memory access characteristics for the virtual address for which the association was changed;

determining whether data corresponding to the virtual address for which the association was changed remains suitable for storage in the asymmetric memory component based on the tracked memory access characteristics; and

in response to a determination that data corresponding to the virtual address for which the association was changed no longer remains suitable for storage in the asymmetric memory component, removing the data corresponding to the virtual address for which the association was changed from the collection of content entries.

34. The method of claim 1 wherein identifying the collection of one or more content entries with access characteristics suitable for storage in the asymmetric memory component comprises identifying multiple content entries with access characteristics suitable for storage in the asymmetric memory component.

35. A method of integrating data stored within symmetric and asymmetric memory components of main memory and storing the resultant integrated data within at least one asymmetric memory component, where the symmetric memory components are each configured to enable random access write operations in which an address within a block of the symmetric memory component is written without affecting the availability of other addresses within the block of the symmetric memory component, and where the asymmetric memory components are each configured to enable block write operations in which a write to an address within a block of one of the asymmetric memory components affects the availability of other addresses within the block of the asymmetric memory component, the method comprising:

identifying a first data as having access characteristics suitable for storing in an asymmetric memory component;

including the first data among a collection of data to be written to the asymmetric memory component;

identifying an amount of data within the collection of data to be written to the asymmetric memory component;

comparing the amount of data within the collection of data to a volume threshold to determine whether a block write to the asymmetric memory component is justified by the amount of data; and

in response to a determination that a block write to the asymmetric memory component is justified by the amount of data;

identifying memory utilization characteristics of multiple regions included in the asymmetric memory component;

analyzing the identified memory utilization characteristics;

based on the analysis of the identified memory utilization characteristics, selecting, from among the multiple regions included in the asymmetric memory component, a region in the asymmetric memory component; and

loading the collection of data to the selected region of the asymmetric memory component.

36. The method of claim 35 wherein identifying the first data as having the access characteristics suitable for storing in the asymmetric memory component includes determining that the first data is an update to second data that was previously stored in the asymmetric memory component.

37. The method of claim 35 wherein including the first data among a collection of data to be written to the asymmetric memory component includes loading the first data to an organization location in a symmetric memory component.

38. The method of claim 37 wherein loading the first data to the organization location in the symmetric memory component includes loading the first data from an original location in the asymmetric memory component.

39. The method of claim 37 wherein loading the first data to the organization location in the symmetric memory component includes loading the first data from an original location in the symmetric memory component.

40. The method of claim 35 wherein including the first data among a collection of data to be written to the asymmetric memory component includes structuring the first data in a block format for use in a block write.

41. The method of claim 35 wherein including the first data among a collection of data to be written to the asymmetric memory component includes structuring the first data in a specialized format for use in a sequence of block writes to a bank.

42. The method of claim 35 further comprising triggering comparison of the amount of data within the collection of data to the volume threshold based upon occurrence of a first threshold number of read operations.

43. The method of claim 35 further comprising triggering comparison of the amount of data within the collection of data to the volume threshold based upon occurrence of a second threshold number of write operations.

44. The method of claim 35 further comprising triggering comparison of the amount of data within the collection of data to the volume threshold based upon occurrence of a third threshold period of time.

45. The method of claim 35 wherein identifying the first data as having the access characteristics suitable for storing in the asymmetric memory component includes:

comparing the first data to second data that has already been added to the collection of data; and

identifying the first data as having content relating to other content appearing in the second data that has already been added to the collection of data.

46. The method of claim 35 wherein identifying the first data as having the access characteristics suitable for storing in the asymmetric memory component includes:

identifying a data structure for the first data;

comparing the data structure to second data that has already been added to the collection of data; and

identifying the first data as being part of a same data structure as the second data that has already been added to the collection of data.

47. A system that integrates data stored within symmetric and asymmetric memory components of main memory and storing the resultant integrated data within at least one asymmetric memory component, where the symmetric memory components are each configured to enable random access write operations in which an address within a block of the symmetric memory component is written without affecting the availability of other addresses within the block of the symmetric memory component, and where the asymmetric memory components are each configured to enable block write operations in which a write to an address within a block of one of the asymmetric memory components affects the availability of other addresses within the block of the asymmetric memory component, the system comprising:

means for receiving a write command to write data to a virtual address associated with a first physical address of an asymmetric memory component of the main memory;

means for configuring a page table to change an association of the virtual address from the association to the first physical address of the asymmetric memory component of the main memory to a second physical address of a symmetric memory component of the main memory;

means for generating an indication that the first physical address is available for association with another virtual address in a subsequent block write operation;

means for identifying a collection of one or more content entries with access characteristics suitable for storage in the asymmetric memory component, the collection of content entries including data corresponding to the virtual address for which the association was changed from the first physical address of the asymmetric memory component of the main memory to the second physical address of the symmetric memory component of the main memory;

means for determining whether the collection of content entries collectively occupy a threshold amount of storage or whether a threshold period of time has elapsed since the association of the virtual address was changed from the first physical address of the asymmetric memory component of the main memory to the second physical address of the symmetric memory component of the main memory; and

means for, in response to determining that the collection of content entries collectively occupy the threshold amount of storage or that the threshold period of time has elapsed;

identifying memory utilization characteristics of multiple regions included in the asymmetric memory component;

analyzing the identified memory utilization characteristics;

based on the analysis of the identified memory utilization characteristics, selecting, from among the multiple regions included in the asymmetric memory component, a region in the asymmetric memory component; and

loading the collection of content entries to the selected region of the asymmetric memory component using a block write command.

48. A system that integrates data stored within symmetric and asymmetric memory components of main memory and storing the resultant integrated data within at least one asymmetric memory component, where the symmetric memory components are each configured to enable random access write operations in which an address within a block of the symmetric memory component is written without affecting the availability of other addresses within the block of the symmetric memory component, and where the asymmetric memory components are each configured to enable block write operations in which a write to an address within a block of one of the asymmetric memory components affects the availability of other addresses within the block of the asymmetric memory component, the system comprising

means for identifying a first data as having access characteristics suitable for storing in an asymmetric memory component;

means for including the first data among a collection of data to be written to the asymmetric memory component;

means for identifying an amount of data within the collection of data to be written to the asymmetric memory component;

means for comparing the amount of data within the collection of data to a volume threshold to determine whether a block write to the asymmetric memory component is justified by the amount of data; and

means for, in response to a determination that a block write to the asymmetric memory component is justified by the amount of data;

identifying memory utilization characteristics of multiple regions included in the asymmetric memory component;

analyzing the identified memory utilization characteristics;

based on the analysis of the identified memory utilization characteristics, selecting, from among the multiple regions included in the asymmetric memory component, a region in the asymmetric memory component; and

loading the collection of data to the selected region of the asymmetric memory component.

49. A system that integrates data stored within symmetric and asymmetric memory components of main memory and storing the resultant integrated data within at least one asymmetric memory component, where the symmetric memory components are each configured to enable random access write operations in which an address within a block of the symmetric memory component is written without affecting the availability of other addresses within the block of the symmetric memory component, and where the asymmetric memory components are each configured to enable block write operations in which a write to an address within a block of one of the asymmetric memory components affects the availability of other addresses within the block of the asymmetric memory component, the system comprising logic that when executed on a processor cause the processor to:

identify a first data as having access characteristics suitable for storing in an asymmetric memory component;

include the first data among a collection of data to be written to the asymmetric memory component;

identify an amount of data within the collection of data to be written to the asymmetric memory component;

compare the amount of data within the collection of data to a volume threshold to determine whether a block write to the asymmetric memory component is justified by the amount of data; and

in response to a determination that a block write to the asymmetric memory component is justified by the amount of data;

identify memory utilization characteristics of multiple regions included in the asymmetric memory component;

analyze the identified memory utilization characteristics;

based on the analysis of the identified memory utilization characteristics, select, from among the multiple regions included in the asymmetric memory component, a region in the asymmetric memory component; and

load the collection of data to the selected region of the asymmetric memory component.

50. A system that integrates data stored within symmetric and asymmetric memory components of main memory and storing the resultant integrated data within at least one asymmetric memory component, where the symmetric memory components are each configured to enable random access write operations in which an address within a block of the symmetric memory component is written without affecting the availability of other addresses within the block of the symmetric memory component, and where the asymmetric memory components are each configured to enable block write operations in which a write to an address within a block of one of the asymmetric memory components affects the availability of other addresses within the block of the asymmetric memory component, the system comprising logic that when executed on a processor cause the processor to:

receive a write command to write data to a virtual address associated with a first physical address of an asymmetric memory component of the main memory;

configure a page table to change an association of the virtual address from the association to the first physical address of the asymmetric memory component of the main memory to a second physical address of a symmetric memory component of the main memory;

generate an indication that the first physical address is available for association with another virtual address in a subsequent block write operation;

identify a collection of one or more content entries with access characteristics suitable for storage in the asymmetric memory component, the collection of content entries including data corresponding to the virtual address for which the association was changed from the first physical address of the asymmetric memory component of the main memory to the second physical address of the symmetric memory component of the main memory;

determine whether the collection of content entries collectively occupy a threshold amount of storage or whether a threshold period of time has elapsed since the association of the virtual address was changed from the first physical address of the asymmetric memory component of the main memory to the second physical address of the symmetric memory component of the main memory; and

in response to determining that the collection of content entries collectively occupy the threshold amount of storage or that the threshold period of time has elapsed;

identify memory utilization characteristics of multiple regions included in the asymmetric memory component;

analyze the identified memory utilization characteristics;

based on the analysis of the identified memory utilization characteristics, select, from among the multiple regions included in the asymmetric memory component, a region in the asymmetric memory component; and

load the collection of content entries to the selected region of the asymmetric memory component using a block write command.