Source and shadow wear-leveling method and apparatus
First Claim
1. A flash memory system comprising:
- flash memory organized into a plurality of blocks of pages, for storage of information, at least each of some of the pages including data and spare, the blocks being identifiable, within the flash memory, by a physical address; and
a flash controller adapted to communicate with a host and the flash memory and including volatile memory configured to store a source-shadow table of logical addresses addressable by the physical addresses, the logical addresses identifying the blocks, by the controller, the source-shadow table having an address mapping table and a property value table, the property value table including property values, each of which is associated with a block of a predetermined group of blocks and indicative of the number of times a block has been written, the property values corresponding to the logical addresses of the address mapping table,wherein a block having been written no more than two times is re-written to different areas of the flash memory without requiring an erase operation, further wherein during power-up, the property values are used to construct the property value table to reflect the current status of the recent information stored in the predetermined group of blocks.
2 Assignments
0 Petitions
Accused Products
Abstract
A flash memory system includes flash memory organized into a plurality of blocks of pages for storage of information, a page including data and spare, the blocks being identifiable, within the flash memory, by a physical address. The system further has a flash controller for communicating with a host and the flash memory and includes volatile memory for storing a source-shadow table of logical addresses identifying blocks addressable by the physical addresses. The source-shadow table has an address mapping table and a property value table. The property value table is used to store property values, each of which is associated with a block of a predetermined group of blocks and is indicative of the number of times a block has been written since the last erase operation performed thereon. The property values correspond to the logical addresses of the address mapping table, wherein a block having been written no more than two times is re-written to different areas of the flash memory without requiring an erase operation.
8 Citations
29 Claims
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1. A flash memory system comprising:
flash memory organized into a plurality of blocks of pages, for storage of information, at least each of some of the pages including data and spare, the blocks being identifiable, within the flash memory, by a physical address; and a flash controller adapted to communicate with a host and the flash memory and including volatile memory configured to store a source-shadow table of logical addresses addressable by the physical addresses, the logical addresses identifying the blocks, by the controller, the source-shadow table having an address mapping table and a property value table, the property value table including property values, each of which is associated with a block of a predetermined group of blocks and indicative of the number of times a block has been written, the property values corresponding to the logical addresses of the address mapping table, wherein a block having been written no more than two times is re-written to different areas of the flash memory without requiring an erase operation, further wherein during power-up, the property values are used to construct the property value table to reflect the current status of the recent information stored in the predetermined group of blocks. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A flash controller comprising:
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a flash controller adapted to communicate with a host and a flash memory, the flash memory organized into a plurality of blocks of pages, for storage of information, at least each of some of the pages including data and spare, the blocks being identifiable, within the flash memory, by a physical address;
the controller including volatile memory configured to store a source-shadow table of logical addresses addressable by the physical addresses, the logical addresses identifying the blocks, by the controller, the source-shadow table having an address mapping portion and a property value portion, the property value portion including property values, each of which is associated with a block of a predetermined group of blocks and indicative of the number of times a block has been written, the property values corresponding to the logical addresses of the address mapping portion,wherein a block having been written no more than two times is re-written to different areas of the flash memory without requiring an erase operation, further wherein during power-up, the property values are used to construct the table to reflect the current status of the recent information stored in the predetermined group of blocks. - View Dependent Claims (17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27)
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28. A method of wear-leveling used in a flash memory system comprising:
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receiving information to be written into a block of flash memory, the flash memory organized into a plurality of blocks of pages, for storage of information, at least each of some of the pages including data and spare, the blocks being identifiable, within the flash memory, by a physical address; determining whether the received block of information has been updated without having been erased since the last time it was written; upon determining that the received block of information has not been updated since it was last written, writing the received block of information into a “
source”
block within the flash memory, identified by a first physical address, wherein the source block is identified by having both its first page and last page written; andupon determining that the received block of information has been previously updated, writing the received block of information into a “
shadow”
block, within the flash memory, identified by a second physical address different than the first, wherein the shadow block is identified by having its first page written but not its last page written. - View Dependent Claims (29)
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Specification