Stack type surface acoustic wave package, and method for manufacturing the same

• US 7,820,468 B2
• Filed: 08/24/2009
• Issued: 10/26/2010
• Est. Priority Date: 05/06/2005
• Status: Expired due to Fees

• Current Assignee: Samsung Electro-Mechanics Co., Ltd. (Samsung Group)
• Original Assignee: Samsung Electro-Mechanics Co., Ltd. (Samsung Group)
• Inventors: Lee, Young Jin, Park, Sang Wook, Lee, Seung Hee, Park, Joo Hun, Kim, Nam Hyeong, Park, Doo Cheol
• Primary Examiner(s): FOURSON III, GEORGE R
• Application Number:
  US12/546,142
• Publication Number:
  US 20100047949A1
• Time in Patent Office: 428 Days
• Field of Search: 438/511.08, 438/113, 438/114, 438/462, 438/FOR.387, 257/E21.599, 257/E21.511
• US Class Current: 438/51
• CPC Class Codes: H01L 2224/0554 External layer
• CPC Class Codes: H01L 2224/0555 Shape
• CPC Class Codes: H01L 2224/0556 Disposition
• CPC Class Codes: H01L 2224/05568 the whole external layer protruding from the surface
• CPC Class Codes: H01L 2224/05573 Single external layer
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/81 using a bump connector
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/3025 Electromagnetic shielding
• CPC Class Codes: H03H 3/08 for the manufacture of resonators or networks using surface acoustic waves
• CPC Class Codes: H03H 9/059 : consisting of mounting pads or bumps
• CPC Class Codes: H03H 9/1078 : the enclosure being defined by a foil covering the non-active sides of the SAW device
• CPC Class Codes: H03H 9/1085 : the enclosure being defined by a non-uniform sealing mass covering the non-active sides of the BAW device

Abstract

Disclosed herein is a stack type surface acoustic wave package. The surface acoustic wave package comprises a first bare chip having a plurality of electrodes formed thereon, a second bare chip having a plurality of electrodes and via-holes formed thereon, a connecting portion electrically connecting the first bare chip to an upper surface of the second bare chip such that the electrodes of the first bare chip face the electrodes of the second bare chip, and a sealing member provided on the first and second bare chips to form an air-tight space on an operating surface between the first and second bare chips. The surface acoustic wave package can prevent deformation due to thermal impact from the outside during a packaging process, enhancing reliability of the product, minimizing the size of the product, and reducing manufacturing costs by reducing the number of components and material costs.

Claims

1. A method for manufacturing a stack type surface acoustic wave package, comprising the steps of:

a) preparing a lower wafer having input, output and IDT electrodes formed on an upper surface thereof, and a plurality of via-holes passing through the lower wafer;

b) forming a metal dam to surround the input, output and IDT electrodes of the lower wafer;

c) bonding an upper wafer having input, output and IDT electrodes formed thereon onto the lower wafer via a metallic bonding agent;

d) forming separating grooves spaced a predetermined from each other and having a predetermined depth on the upper wafer;

e) plating a metal layer of a predetermined thickness from the upper surface of the metal dam to cover the upper wafer; and

f) dicing a central portion between the separating grooves plated with the metal layer.

2. The method according to claim 1, wherein the step a) comprises printing a conductive pattern on upper ends of the via-holes to be electrically connected to the input and output electrodes, and another conductive pattern on lower ends of the via-holes to be electrically connected to a main board.

3. The method according to claim 1, wherein the step b) comprises forming the metallic bonding agent while forming the metal dam on the lower wafer.

4. The method according to claim 1, wherein at the step b), the metal layer is electrically connected to an inner ground terminal to prevent electromagnetic waves from being induced from the outside after plating the metal layer.

5. The method according to claim 1, wherein the step c) comprises flip-chip bonding of the upper wafer to the lower wafer via the metallic bonding agent such that the input and output electrodes, and the IDT electrodes of the upper wafer face the input and output electrodes, and the IDT electrodes of the lower wafer, respectively.

6. The method according to claim 5, wherein flip-chip bonding of the upper wafer to the lower wafer comprises supersonic bonding by use of stud bumps interposed between a conductive pad laid on the input and output electrodes of the upper wafer and another conductive pad laid on the input and output electrodes of the lower wafer.

7. The method according to claim 5, wherein flip-chip bonding of the upper wafer to the lower wafer comprises thermal bonding by use of AuSn-based solder bumps interposed between a conductive pad laid on the input and output electrodes of the upper wafer and another conductive pad laid on the input and output electrodes of the lower wafer.

8. The method according to claim 1, wherein at the step d), the separating grooves are formed to an extent that the upper surface of the lower wafer is exposed to the outside.

9. The method according to claim 1, wherein, at the step e), the metal layer is plated by an electroplating process.