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Patterned backside stress engineering for transistor performance optimization

  • US 7,821,073 B2
  • Filed: 04/03/2008
  • Issued: 10/26/2010
  • Est. Priority Date: 09/24/2004
  • Status: Active Grant
First Claim
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1. An apparatus comprising:

  • a first surface of a substrate haying a first transistor type region and a second transistor type region; and

    a heat spreader attached to a substrate surface opposite the first surface, the heat spreader having a portion opposite the first transistor type region that is thinner than a portion opposite the second transistor type region, wherein the portion opposite the first transistor type region is about 0.1 to 1.25 mm thick and the portion opposite the second transistor type region is about 1.25 to 2.75 mm thick.

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