Power factor correction (PFC) controller and method using a finite state machine to adjust the duty cycle of a PWM control signal
First Claim
1. A power factor corrector (PFC), comprising:
- a switch-mode boost stage having a switch and an inductor coupled to the switch wherein the switch-mode boost stage receives a rectified line input voltage and provides a link output voltage and wherein a sensed current is observed from the switch-mode boost stage; and
a target current generator for receiving the link output voltage and for generating a target current proportionate to the rectified line input voltage;
a comparator for receiving a target current value representative of the target current and a sensed current value representative of the sensed current and outputting a two-level current comparison result signal; and
a finite state machine responsive to the two-level current comparison result signal, generating a switch control signal that has a duty cycle which is adjusted for controlling the switch so that the sensed current is approximately proportionate to the rectified line input voltage, such that power factor correction is performed.
1 Assignment
0 Petitions
Accused Products
Abstract
A power factor correction (PFC) controller and method uses a finite state machine to adjust the duty cycle of a pulse width modulation (PWM) switching control signal. The PFC controller has a target current generator that receives the link output voltage and generates a target current proportionate to the rectified line input voltage. The PFC controller further includes a comparator which outputs a two-level current comparison result signal. The finite state machine responsive to the two-level current comparison result signal, generates a switch control signal that has a duty cycle which is adjusted for controlling the switch so that the sensed current is approximately proportionate to the rectified line input voltage, such that power factor correction is performed.
-
Citations
35 Claims
-
1. A power factor corrector (PFC), comprising:
-
a switch-mode boost stage having a switch and an inductor coupled to the switch wherein the switch-mode boost stage receives a rectified line input voltage and provides a link output voltage and wherein a sensed current is observed from the switch-mode boost stage; and a target current generator for receiving the link output voltage and for generating a target current proportionate to the rectified line input voltage; a comparator for receiving a target current value representative of the target current and a sensed current value representative of the sensed current and outputting a two-level current comparison result signal; and a finite state machine responsive to the two-level current comparison result signal, generating a switch control signal that has a duty cycle which is adjusted for controlling the switch so that the sensed current is approximately proportionate to the rectified line input voltage, such that power factor correction is performed. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
-
-
17. A method for power factor correction (PFC), comprising:
-
coupling a switch and an inductor together to form a switch-mode boost stage that receives a rectified line input voltage and provides a link output voltage; observing a sensed current from the switch-mode boost stage; receiving a link output voltage; generating a target current proportionate to the rectified line input voltage; comparing a target current value representative of the target current and a sensed current value representative of the sensed current; in response to the comparing, outputting a two-level current comparison result signal; and in response to the two-level current comparison result signal, generating a switch control signal that has a duty cycle which is adjusted for controlling the switch so that the sensed current is approximately proportionate to the rectified line input voltage, such that power factor correction is performed. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24, 25)
-
-
26. An integrated circuit which incorporates a power factor correction controller that includes a target current generator, a comparator, and a finite state machine, the integrated circuit configured to:
-
receive a signal representative of a rectified line input voltage; observe a sensed current from an external switch-mode boost stage; receive another signal representative of a link output voltage; generate a target current proportionate to the input signal; compare a target current value representative of the target current and a sensed current value representative of the sensed current; in response to the compare, output a two-level current comparison result signal; and in response to the two-level current comparison result signal, generate a switch control signal that has a duty cycle which is adjusted for controlling the switch so that the sensed current is approximately proportionate to the rectified line input voltage, such that power factor correction is performed.
-
-
27. A power factor corrector (PFC), comprising:
-
a switch-mode boost stage having a switch and an inductor coupled to the switch wherein the switch-mode boost stage receives a rectified line input voltage and provides a link output voltage and wherein a sensed current is observed from the switch-mode boost stage; and a target current generator for receiving the link output voltage and for generating a target current proportionate to the rectified line input voltage; a ripple current estimator for generating a ripple current that estimates a peak-to-peak inductor ripple current; a comparator, responsive to the target current, the ripple current, and the sensed current, for outputting a two-level current comparison result signal; and a finite slate machine responsive to the two-level current comparison result signal, generating a switch control signal that has a duty cycle which is adjusted for controlling the switch so that the sensed current is approximately proportionate to the rectified line input voltage, such that power factor correction is performed. - View Dependent Claims (28, 29, 30, 31)
-
-
32. A method for power factor correction (PFC), comprising:
-
coupling a switch and an inductor together to form a switch-mode boost stage that receives a rectified line input voltage; observing a sensed current from the switch-mode boost stage; receiving a link output voltage; generating a target current proportionate to the rectified line input voltage; generating a ripple current that estimates a peak-to-peak inductor ripple current; in response to the target current, the ripple current, and the sensed current, generating a two-level current comparison result signal; and in response to the two-level current comparison result signal, generating a switch control signal that has a duty cycle which is adjusted for controlling the switch so that the sensed current is approximately proportionate to the rectified line input voltage, such that power factor correction is performed. - View Dependent Claims (33, 34)
-
-
35. An integrated circuit which incorporates a power factor correction controller that includes a target current generator, a comparator, and a finite state machine, the integrated circuit configured to:
-
receive a signal representative of a rectified line input voltage; observe a sensed current from an external switch-mode boost stage; receive another signal representative of a link output voltage; generate a target current proportionate to the rectified line input voltage; generate a ripple current that estimates a peak-to-peak inductor ripple current; in response to the target current, the ripple current, and the sensed current, generate a two-level current comparison result signal; and in response to the two-level current comparison result signal, generate a switch control signal that has a duty cycle which is adjusted for controlling the switch so that the sensed current is approximately proportionate to the rectified line input voltage, such that power factor correction is performed.
-
Specification