Digital reliability monitor having autonomic repair and notification capability

• US 7,823,002 B2
• Filed: 07/02/2007
• Issued: 10/26/2010
• Est. Priority Date: 12/04/2003
• Status: Expired due to Fees

• Current Assignee: GlobalFoundries, Inc.
• Original Assignee: International Business Machines Corporation
• Inventors: LeStrange, Michael, Bonaccio, Anthony R., Ventrone, Sebastian T., Tonti, William R.
• Primary Examiner(s): Bae; Ji H
• Application Number:
  US11/772,418
• Publication Number:
  US 20070283185A1
• Time in Patent Office: 1,212 Days
• Field of Search: 713/500, 713/502, 714/100
• US Class Current: 713/502
• CPC Class Codes: G06F 1/04 Generating or distributing clock signals or signals derived directly therefrom

Abstract

An integrated circuit, including: a pulse generator adapted to generate a pulsed signal; a cycle counter adapted to count cycles of the pulsed signal; one or more repairable circuit elements; and a repair processor adapted to repair a repairable circuit element when the cycle counter reaches a pre-determined cycle count.

Claims

1. An integrated circuit, comprising:

a pulse generator connected to a cycle counter, said cycle counter connected to a repair processor, said repair processor connected to a repairable circuit element, said pulse generator configured to generate pulses only when said repairable circuit element is powered, said cycle counter configured to count cycles of said pulsed signal;

a memory circuit configured to store a cycle count of the number of cycles counted since an initial power up and said cycle counter configured to resume counting from said stored cycle count after a power down/power up cycle of said integrated circuit; and

said repair processor configured to automatically repair said repairable circuit element when said cycle counter reaches a pre-determined cycle count of pulses generated by said pulse generator.

2. The integrated circuit of claim 1, further including:

said repair processor including means for replacing said repairable circuit element with a redundant circuit element having the same function as said repairable circuit element.

3. The integrated circuit of claim 1, wherein said pulsed signal is a clock signal and said repairable circuit element is responsive to said clock signal.

4. The integrated circuit of claim 1, wherein:

said cycle counter is configured to generate a trigger signal when said predetermined cycle count is reached; and

said repair processor is configured to receive said trigger signal and affect a repair of said repairable circuit element when said trigger signal is received.

5. The integrated circuit of claim 4, wherein said trigger signal comprises a subset of a set of bits encoding a current cycle count of said cycle counter.

6. The integrated circuit of claim 1, wherein said repairable circuit element is selected from the group consisting of a digital circuit, an analog circuit, a memory circuit, a latch, a logic gate, a group of logic gates, an individual devices, a transistor, a diode, a resistors, capacitor, an inductor and a wire.

7. The integrated circuit of claim 1, wherein said repairable circuit element is implemented in a field programmable gate array and said repair processor programs a replacement of selected gates of said field programmable gate array with previously unused gates of said field programmable gate array.

8. The integrated circuit of claim 2, further including a fuse bank configured to direct inputs and outputs of said redundant circuit element and said repairable circuit element based on states of fuses in said fuse bank.

9. The integrated circuit of claim 1, wherein said repair processor is configured to perform multiple repairs by repairing previously repaired repairable circuit elements.

10. The integrated circuit of claim 1, further including:

a redundant cycle counter; and

wherein said repair processor is configured to replace said cycle counter with said redundant cycle counter when said cycle counter reaches a fixed cycle count.

11. A method of repairing an integrated circuit, comprising:

providing said integrated circuit, said integrated circuit comprising a pulse generator connected to a cycle counter, said cycle counter connected to a repair processor, said repair processor connected to a repairable circuit element;

counting cycles of said pulsed signal in said cycle counter only when said repairable circuit element is powered;

storing a cycle count of a number of cycles counted since an initial power up in said memory unit;

resuming counting from said stored cycle count after a power down/power up cycle of said integrated circuit; and

automatically repairing said repairable circuit element when said cycle counter reaches a pre-determined cycle count, said repairable circuit element operable at said pre-determined cycle count.

12. The method of claim 11, wherein said repairing includes:

replacing said one or more repairable circuit element with a redundant circuit element having the same function as said repairable circuit element.

13. The method if claim 11, wherein said pulsed signal is a clock signal and said repairable circuit element is responsive to said clock signal.

14. The method of claim 11, further including:

said cycle counter generating a trigger signal when said predetermined cycle count is reached; and

said repair processor receiving said trigger signal and affecting a repair of said repairable circuit element when said trigger signal is received.

15. The method of claim 14, wherein said trigger signal comprises a subset of a set of bits encoding a current cycle count of said cycle counter.

16. The method of claim 11, wherein said repairable circuit element is selected from the group consisting of a digital circuit, an analog circuit, a memory circuit, a latch, a logic gate, a group of logic gates, an individual device, a transistor, a diode, a resistor, a capacitor, an inductor and a wire.

17. The method of claim 11, wherein said repairable circuit element is implemented in a field programmable gate array and said repair processor programs a replacement of selected gates of said field programmable gate array with previously unused gates of said field programmable gate array.

18. The method of claim 12, wherein said integrated circuit includes a fuse bank and further including:

directing inputs and outputs of said redundant circuit element and repairable circuit element based on states of fuses in said fuse bank.

19. The method of claim 11, further including:

performing multiple repairs by repairing previously repaired repairable circuit elements.

20. The method of claim 11, wherein said integrated circuit includes a redundant cycle counter and further including:

automatically replacing said cycle counter with said redundant cycle counter when said cycle counter reaches a fixed cycle count.

21. An integrated circuit, comprising:

a pulse generator connected to a cycle counter, said cycle counter connected to a repair processor, said repair processor connected to a repairable circuit, and a counter memory connected to said clock cycle counter;

said cycle counter configured to count cycles of said pulsed signal during power up phases of power up/power down cycles and configured to store a cumulated count of cycle counted by said cycle counter during said power up phases in said counter memory; and

said repair processor configured to automatically repair said repairable circuit element when said cycle counter reaches a pre-determined cycle count of pulses generated by said pulse generator.

22. The integrated circuit of claim 21, further including:

said repair processor including means for replacing said repairable circuit element with a redundant circuit element having the same function as said repairable circuit element.

23. The integrated circuit of claim 22, further including a fuse bank configured to direct inputs and outputs of said redundant circuit element and said repairable circuit elements based on a state of fuses in said fuse bank.

24. The integrated circuit of claim 21, wherein said pulsed signal is a clock signal and said repairable circuit element is responsive to said clock signal.

25. The integrated circuit of claim 21, wherein:

said cycle counter is configured to generate a trigger signal when said predetermined cycle count is reached; and

said repair processor is configured to receive said trigger signal and affect a repair of said repairable circuit element when said trigger signal is received.

26. The integrated circuit of claim 25, wherein said trigger signal comprises a subset of a set of bits encoding a current cycle count of said cycle counter.

27. The integrated circuit of claim 21, said repair processor including means for replacing repairable circuit element with a redundant circuit element having the same function as said repairable circuit element and wherein said repair processor is configured to perform multiple repairs by replacing said redundant circuit element with said repairable circuit element after an additional pre-determined cycle count of pulses generated by said pulse generator.

28. The integrated circuit of claim 21, further including:

a redundant cycle counter; and

wherein said repair processor is configured to replace said cycle counter with said redundant cycle counter when said cycle counter reaches a fixed cycle count.