Multi-metal-oxide high-K gate dielectrics

• US 7,824,990 B2
• Filed: 01/10/2006
• Issued: 11/02/2010
• Est. Priority Date: 12/05/2005
• Status: Expired due to Fees

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Lim, Peng-Soon, Chang, Vincent S., Tao, Hun-Jan, Ying, Jin, Yen, Fong-Yu
• Primary Examiner(s): MALSAWMA, LALRINFAMKIM HMAR
• Application Number:
  US11/328,933
• Publication Number:
  US 20070128736A1
• Time in Patent Office: 1,757 Days
• Field of Search: 438/287, 438/785, 257/E21.489
• US Class Current: 438/287
• CPC Class Codes: H01L 21/02175 characterised by the metal H01L21/02197 takes precedence
• CPC Class Codes: H01L 21/02178 the material containing aluminium, e.g. Al2O3
• CPC Class Codes: H01L 21/02181 the material containing hafnium, e.g. HfO2
• CPC Class Codes: H01L 21/0228 deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
• CPC Class Codes: H01L 21/02337 treatment by exposure to a gas or vapour
• CPC Class Codes: H01L 21/28079 the final conductor layer next to the insulator being a single metal, e.g. Ta, W, Mo, Al
• CPC Class Codes: H01L 21/28194 by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition H01L21/28202 takes precedence
• CPC Class Codes: H01L 21/3141 Deposition using atomic layer deposition techniques [ALD]
• CPC Class Codes: H01L 21/31645 Deposition of Hafnium oxides, e.g. HfO2
• CPC Class Codes: H01L 29/1054 with a variation of the composition, e.g. channel with strained layer for increasing the mobility
• CPC Class Codes: H01L 29/4958 with a multiple layer structure
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
• CPC Class Codes: H01L 29/6659 with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
• CPC Class Codes: H01L 29/7833 with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's for thin film transistors H01L29/78618

Abstract

A semiconductor structure having a high-k dielectric and its method of manufacture is provided. A method includes forming a first dielectric layer over the substrate, a metal layer over the first dielectric layer, and a second dielectric layer over the metal layer. A method further includes annealing the substrate in an oxidizing ambient until the three layers form a homogenous high-k dielectric layer. Forming the first and second dielectric layers comprises a non-plasma deposition process such atomic layer deposition (ALD), or chemical vapor deposition (CVD). A semiconductor device having a high-k dielectric comprises an amorphous high-k dielectric layer, wherein the amorphous high-k dielectric layer comprises a first oxidized metal and a second oxidized metal. The atomic ratios of all oxidized metals are substantially uniformly within the amorphous high-k dielectric layer.

Claims

1. A method of forming a high-k dielectric layer on a substrate, the method comprising:

forming a first dielectric layer over the substrate;

forming a substantially nitrogen free metal layer over the first dielectric layer;

forming a second dielectric layer over the metal layer; and

annealing the substrate in an oxidizing ambient until the first dielectric layer, the metal layer, and the second dielectric layer combine to form a homogenous high-k dielectric layer.

2. The method of claim 1, wherein forming the first and second dielectric layers comprises a non-plasma deposition process.

3. The method of claim 2, wherein the non-plasma deposition process comprises a process selected from the group consisting essentially of atomic layer deposition (ALD), and chemical vapor deposition (CVD).

4. The method of claim 1, wherein forming the metal layer comprises plasma vapor deposition.

5. The method of claim 4, wherein the metal layer comprises a material selected from the group consisting essentially of Ti, Ta, Zr, and combinations thereof.

6. The method of claim 1, wherein the metal layer comprises at least two materials selected from the group consisting essentially of Ti, Ta, Zr, and combinations thereof.

7. The method of claim 1, wherein the first and second dielectric layers comprise a material selected from the group consisting essentially of HfSiON, Ta₂O₅, TiO₂, Al₂O₃, ZrO₂, HfO₂, Y₂O₃, HfSiO_x, HfAlO_x, La₂O₃, DyScO₃, PbTiO₃, BaTiO₃, SrTiO₃, PbZrO₃, rare-earth oxides, rare-earth scandates, aluminates and silicates thereof, and combinations thereof.

8. The method of claim 1, further comprising forming an interfacial layer between the substrate and the homogenous high-k dielectric layer, wherein the interfacial layer comprises a material selected from the group consisting essentially of SiN, SiO, SiO₂, SiON, Si, Hf, Al, Zr, Ti, Ta, La, Y, and combinations thereof.

9. The method of claim 1, wherein the oxidizing ambient comprises a material selected from the group consisting essentially of O₂, O₃, N₂O, NO_x, and combinations thereof.

10. The method of claim 1, wherein the homogenous high-k dielectric layer is substantially amorphous.

11. The method of claim 1, wherein annealing the substrate comprises maintaining a temperature lower than about 1000°

C.

12. The method of claim 1, wherein the homogenous high-k dielectric layer comprises a first metal and a second metal, wherein an atomic ratio of the first metal to the second ratio is between about 3:

7 and about 7;

3.

13. A method of forming a semiconductor structure on a substrate, the method comprising:

forming an interfacial layer over the substrate;

forming a first high-k dielectric layer over the substrate using an atomic layer deposition (ALD) process;

forming a non-nitrogen metal layer over the first high-k dielectric layer;

forming a second high-k dielectric layer over the non-nitrogen metal layer using an ALD process; and

transforming the first high-k dielectric layer, the non-nitrogen metal layer, and the second high-k dielectric layer into a substantially homogenous high-k dielectric layer.

14. The method of claim 13, wherein the transforming is performed at least in part by annealing the substrate in an oxidizing ambient until the first high-k dielectric layer, the non-nitrogen metal layer, and the second high-k dielectric layer form a homogenous high-k dielectric layer.

15. The method of claim 14, wherein the oxidizing ambient comprises a material selected from the group consisting essentially of O₂, O₃, N₂O, NO_x, and combinations thereof.

16. The method of claim 14, wherein the annealing oxidizes the first metal layer thereby forming an oxidized metal, wherein the oxidized metal has a dielectric constant equal to or greater than the first high-k dielectric layer.

17. The method of claim 13, wherein the first and second high-k dielectric layers have different respective dielectric constants.

18. The method of claim 13, wherein the first and second high-k dielectric layer comprise a material selected from the group consisting essentially HfSiON, Ta₂O₅, TiO₂, Al₂O₃, ZrO₂, HfO₂, Y₂O₃, HfSiO_x, HfAlO_x, La₂O₃, DyScO₃, PbTiO₃, BaTiO₃, SrTiO₃, PbZrO₃, rare-earth oxides, rare-earth scandates, aluminates and silicates thereof, and combinations thereof.

19. The method of claim 13, wherein the non-nitrogen metal layer comprises a first metal layer and a second metal layer.

20. The method of claim 19, wherein the first and second metal layers have a thickness ratio between about 3:

7 and about 7;

3.

21. The method of claim 19, wherein the first and second metal layers have a thickness ratio between about 4:

6 and about 6;

4.