×

Memory with output control

  • US 7,826,294 B2
  • Filed: 11/21/2008
  • Issued: 11/02/2010
  • Est. Priority Date: 09/30/2005
  • Status: Active Grant
First Claim
Patent Images

1. A device into which a clock input (CLKI) signal is received, and out of which a clock output (CLKO) signal is transmitted, the device comprising:

  • flash memory;

    input connections for receiving data, an output enable signal, and the CLKI signal that provides for synchronization with respect to the received data;

    output connections for transmitting the CLKO signal, and for transmitting the data in response to the output enable signal being held to a logic level for a number of edges of the CLKO signal that provides for other synchronization; and

    a Phase Lock Loop (PLL) to match any phase difference between the CLKI and CLKO signals.

View all claims
  • 11 Assignments
Timeline View
Assignment View
    ×
    ×