Semiconductor device and wireless communication system
First Claim
1. A semiconductor device which inputs and outputs data by wireless communication, comprising:
- an analog portion and a digital portion;
a power supply circuit provided in the analog portion;
an encoding output circuit provided in the digital portion; and
an encoding circuit provided in the encoding output circuit,the encoding circuit comprising;
a reset control circuit to which a modulation mode select signal that selects an amplitude-modulation mode or a frequency-modulation mode, and Manchester-encoded information are input, which outputs a first reset signal and a second reset signal;
a first frequency-dividing circuit to which a carrier wave is input, which outputs a sub-carrier wave responding to an amplitude-modulation mode or a frequency-modulation signal responding to a frequency-modulation mode, according to the first reset signal;
a second frequency-dividing circuit which outputs a basic clock signal of which a duty ratio is different between an amplitude-modulation mode and a frequency-modulation mode, according to the second reset signal and an output of the first frequency-dividing circuit; and
an ASK/FSK switching portion comprising an ASK signal generating portion and an output signal switching portion,wherein the Manchester-encoded information is input to the ASK signal generating portion,wherein in a case where the sub-carrier wave responding to the amplitude-modulation mode and the output from the first frequency-dividing circuit is input to the ASK signal generating portion, the ASK signal generating portion processes arithmetically the sub-carrier wave responding to the amplitude-modulation mode and the Manchester-encoded information, and an amplitude-modulation signal is output from the ASK signal generating portion to be input to the output signal switching portion, andwherein in a case where the frequency-modulation signal responding to the frequency-modulation mode is input to the ASK signal generating portion, the frequency-modulation signal is output from the ASK signal generating portion to be input to the output signal switching portion.
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Accused Products
Abstract
The present invention provides a structure in which an amplitude-modulation mode and a frequency-modulation mode are switched. A semiconductor device of the invention has: a reset control circuit to which a modulation mode select signal which selects an amplitude-modulation mode or a frequency-modulation mode and Manchester-encoded information are input, which outputs a first reset signal and a second reset signal; a first frequency-dividing circuit to which a carrier wave is input, which outputs a sub-carrier wave responding to the amplitude-modulation mode or a frequency-modulation signal responding to the frequency-modulation mode, according to the first reset signal; a second frequency-dividing circuit which outputs a basic clock of which a duty ratio is different between the amplitude-modulation mode and the frequency-modulation mode, according to the second reset signal and an output of the first frequency-dividing circuit; and an ASK/FSK switching portion to which an output from the first frequency-dividing circuit and Manchester-encoded information are input, which outputs an amplitude-modulation signal or a frequency-modulation signal according to the modulation mode select signal.
32 Citations
8 Claims
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1. A semiconductor device which inputs and outputs data by wireless communication, comprising:
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an analog portion and a digital portion; a power supply circuit provided in the analog portion; an encoding output circuit provided in the digital portion; and an encoding circuit provided in the encoding output circuit, the encoding circuit comprising; a reset control circuit to which a modulation mode select signal that selects an amplitude-modulation mode or a frequency-modulation mode, and Manchester-encoded information are input, which outputs a first reset signal and a second reset signal; a first frequency-dividing circuit to which a carrier wave is input, which outputs a sub-carrier wave responding to an amplitude-modulation mode or a frequency-modulation signal responding to a frequency-modulation mode, according to the first reset signal; a second frequency-dividing circuit which outputs a basic clock signal of which a duty ratio is different between an amplitude-modulation mode and a frequency-modulation mode, according to the second reset signal and an output of the first frequency-dividing circuit; and an ASK/FSK switching portion comprising an ASK signal generating portion and an output signal switching portion, wherein the Manchester-encoded information is input to the ASK signal generating portion, wherein in a case where the sub-carrier wave responding to the amplitude-modulation mode and the output from the first frequency-dividing circuit is input to the ASK signal generating portion, the ASK signal generating portion processes arithmetically the sub-carrier wave responding to the amplitude-modulation mode and the Manchester-encoded information, and an amplitude-modulation signal is output from the ASK signal generating portion to be input to the output signal switching portion, and wherein in a case where the frequency-modulation signal responding to the frequency-modulation mode is input to the ASK signal generating portion, the frequency-modulation signal is output from the ASK signal generating portion to be input to the output signal switching portion. - View Dependent Claims (3, 4, 5, 6, 7, 8)
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2. A semiconductor device which inputs and outputs data by wireless communication, comprising:
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a reset control circuit to which a modulation mode select signal that selects an amplitude-modulation mode or a frequency-modulation mode, and Manchester-encoded information are input, which outputs a first reset signal and a second reset signal; a first frequency-dividing circuit to which a carrier wave is input, which outputs a sub-carrier wave responding to an amplitude-modulation mode or a frequency-modulation signal responding to a frequency-modulation mode, according to the first reset signal; a low-speed/high-speed switching portion to which an output signal of the first frequency-dividing circuit is input, which outputs a basic clock control signal according to a selected data transmission rate wherein a signal having a same frequency as the output signal of the first frequency-dividing circuit is outputted from the low-speed/high-speed switching portion as the basic clock control signal when a high speed rate is selected as the data transmission rate, and wherein a signal divided from the output signal of the first frequency-dividing circuit is outputted from the low-speed/high-speed switching portion as the basic clock control signal when a low speed rate is selected as the data transmission rate; a second frequency-dividing circuit which outputs a basic clock signal of which a duty ratio is different between an amplitude-modulation mode and a frequency-modulation mode, and of which a cycle is different according to a data transmission rate, according to the second reset signal and the basic clock control signal; and an ASK/FSK switching portion comprising an ASK signal generating portion and an output signal switching portion, wherein the Manchester-encoded information is input to the ASK signal generating portion, wherein in a case where the sub-carrier wave responding to the amplitude-modulation mode and the output signal from the first frequency-dividing circuit is input to the ASK signal generating portion, the ASK signal generating portion processes arithmetically the sub-carrier wave responding to the amplitude-modulation mode and the Manchester-encoded information, and an amplitude-modulation signal is output from the ASK signal generating portion to be input to the output signal switching portion, and wherein in a case where the frequency-modulation signal responding to the frequency-modulation mode is input to the ASK signal generating portion, the frequency-modulation signal is output from the ASK signal generating portion to be input to the output signal switching portion.
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Specification