Field effect transistor manufacturing method

• US 7,829,444 B2
• Filed: 11/09/2005
• Issued: 11/09/2010
• Est. Priority Date: 11/10/2004
• Status: Active Grant

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.), Japan Science & Technology Trading Co. Limited, Tokyo Institute of Technology (National University Corporation Tokyo Institute of Technology)
• Original Assignee: Canon Kabushiki Kaisha (Canon Inc.), Tokyo Institute of Technology (National University Corporation Tokyo Institute of Technology)
• Inventors: Sano, Masafumi, Yabuta, Hisato, Kamiya, Toshio, Nomura, Kenji, Iwasaki, Tatsuya, Hosono, Hideo
• Primary Examiner(s): Bryant; Kiesha R
• Assistant Examiner(s): Yang; Minchul
• Application Number:
  US11/269,641
• Publication Number:
  US 20060110867A1
• Time in Patent Office: 1,826 Days
• Field of Search: 438/151, 438/197, 438/482, 438/485, 438/483, 257/43, 257/57, 257/E21.497
• US Class Current: 438/483
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous

Abstract

Provided is a novel method for manufacturing a field effect transistor. Prior to forming an amorphous oxide layer on a substrate, ultraviolet rays are irradiated onto the substrate surface in an ozone atmosphere, plasma is irradiated onto the substrate surface, or the substrate surface is cleaned by a chemical solution containing hydrogen peroxide.

Claims

1. A method of manufacturing a field-effect transistor comprising:

a first step of preparing a substrate; and

a second step of forming on the substrate an insulating layer or an active layer comprising an amorphous oxide semiconductor comprising one element of at least In, Zn and Sn,

(A) wherein the second step is conducted in an atmosphere of at least one of (i) ozone gas, (ii) nitrogen oxide gas, (iii) oxygen radical, (iv) elemental oxygen, (v) oxygen plasma, or (vi) oxygen ion, at an oxygen partial pressure sufficient to reduce electron carrier density of said amorphous oxide semiconductor to less than 1×

10¹⁸ cm³, and wherein

(a) the atmosphere of (i) ozone gas is generated by supplying the ozone gas (i) to a deposition chamber by generating the ozone gas (i) by means of supplying oxygen to an ozone generating device in the deposition chamber,

(b) the atmosphere of (ii) nitrogen oxide gas is generated by supplying the nitrogen oxide gas (ii) to the deposition chamber from outside the deposition chamber,

(c) the atmosphere of oxygen radical (iii)-containing gas or elemental oxygen (iv)-containing gas is generated by supplying the oxygen radical (iii)-containing gas or the elemental oxygen (iv)-containing gas to the deposition chamber by generating the oxygen radical (iii)-containing gas or the elemental oxygen (iv)-containing gas by means of supplying oxygen to a radical or elemental oxygen generating device spaced within or outside the deposition chamber; and

(d) the atmosphere of oxygen plasma (v) or oxygen ion (vi) is generated by;

irradiating the substrate with plasma beam or oxygen ion-containing ion beam;

or by supplying oxygen to a plasma or elemental oxygen generating device spaced within or outside the deposition chamber, or

(B) wherein after the second step is conducted to form the amorphous oxide semiconductor, oxygen partial pressure is controlled to reduce said electron carrier density to less than 1×

10¹⁸ cm³ in an atmosphere of at least one of said (i)-(vi) generated by one said steps (a)-(d), respectively.

2. A method of manufacturing a field-effect transistor comprising:

a first step of preparing a substrate;

a second step of depositing on the substrate an insulating layer or an active layer comprising an amorphous oxide semiconductor comprising one element selected from at least In, Zn and Sn; and

a third step of thermal processing, at a higher temperature than a deposition temperature of the active layer or the insulating layer in the second step, in an atmosphere of water vapor, wherein the atmosphere of water vapor is saturated water vapor pressure.

3. A method of manufacturing a field-effect transistor according to claim 2, wherein the temperature of the thermal processing is higher than the deposition temperature of the active layer or the insulating layer, and is not more than 200°

C.