Deinterlacer using low angle or high angle spatial interpolation

• US 7,830,449 B2
• Filed: 04/03/2007
• Issued: 11/09/2010
• Est. Priority Date: 09/04/2002
• Status: Active Grant

• Current Assignee: F Poszat Hu LLC (Intellectual Ventures LLC)
• Original Assignee: Denace Enterprise Co LLC (Intellectual Ventures LLC)
• Inventors: Zhou, Qinggang, Wu, Sheng-Fu, Chan, Andrew K., Nagakura, Clyde H.
• Primary Examiner(s): LEE, MICHAEL
• Application Number:
  US11/732,434
• Publication Number:
  US 20070177056A1
• Time in Patent Office: 1,316 Days
• Field of Search: 348441-459, 382/300
• US Class Current: 348/452
• CPC Class Codes: G06T 3/4023 based on decimating pixels or lines of pixels; based on inserting pixels or lines of pixels
• CPC Class Codes: G09G 2310/0229 De-interlacing
• CPC Class Codes: G09G 2320/106 Determination of movement vectors or equivalent parameters within the image
• CPC Class Codes: G09G 2340/0407 Resolution change, inclusive of the use of different resolutions for different screen areas
• CPC Class Codes: G09G 5/363 Graphics controllers
• CPC Class Codes: H04N 5/21 Circuitry for suppressing or minimising disturbance, e.g. moiré or halo
• CPC Class Codes: H04N 7/012 Conversion between an interlaced and a progressive signal for graphics images G09G2310/0229
• CPC Class Codes: H04N 7/0135 involving interpolation processes interpolation-based image scaling G06T3/4007; interpolation for video coding H04N19/587, H04N19/59

Abstract

A display processor integrated circuit includes a display processor portion and an on-chip programmable logic portion. The programmable logic portion can be configured to implement custom video and/or image enhancement functions. The display processor portion performs block-based motion detection. If no motion is detected for a given block of pixels, then interline gaps in the block are filled using temporal interpolation. If motion is detected, then interline gaps are filled using spatial interpolation. To maintain accuracy without unduly increasing computational complexity, a less complex high angle spatial interpolation method is employed where a low angle tilt condition is not detected. A more computationally intensive low angle spatial interpolation method can therefore be employed in low angle tilt conditions. Integrated circuit cost is reduced by employing pipelining to write parts of segment buffers at the same time that other parts are being read to perform the interpolation process.

Claims

1. A method comprising:

determining that a block of pixels in a field of pixels of video information exhibits a motion characteristic, wherein the block of pixels has a missing pixel in an interline gap;

generating a plurality of missing pixel gradient values using pixels surrounding the missing pixel, wherein the plurality of missing pixel gradient values exhibits a pattern;

based on the pattern of the plurality of missing pixel gradient values, determining whether the missing pixel exhibits a left tilt gradient condition or a right tilt gradient condition;

generating the missing pixel using high angle spatial interpolation if the missing pixel exhibits neither the left tilt gradient condition nor the right tilt gradient condition; and

generating the missing pixel using low angle spatial interpolation if the missing pixel exhibits either the left tilt gradient condition or the right tilt gradient condition.

2. The method of claim 1, wherein if the missing pixel exhibits the left tilt gradient condition then performing a left tilt low angle spatial interpolation to generate the missing pixel, and wherein if the missing pixel exhibits the right tilt gradient condition then performing a right tilt low angle spatial interpolation to generate the missing pixel.

3. The method of claim 2, wherein the left tilt low angle spatial interpolation is a left tilt chrominance low angle spatial interpolation.

4. The method of claim 2, wherein the left tilt low angle spatial interpolation is a left tilt luminance low angle spatial interpolation.

5. The method of claim 1, wherein the high angle spatial interpolation uses a first number of the pixels to generate the missing pixel, wherein the low angle spatial interpolation uses a second number of the pixels to generate the missing pixel, and wherein the second number is greater than the first number.

6. The method of claim 1, wherein the pixels surrounding the missing pixel used in the generating the plurality of the missing pixel gradient values are taken from four rows of twenty-three pixels each that surround the missing pixel.

7. The method of claim 1, wherein the block of pixels has six or fewer lines, and wherein each of the lines has twenty or fewer pixels.

8. The method of claim 1, wherein generating the plurality of the missing pixel gradient values further comprises:

using at least three pixel luminance values from pixels in a first row of pixels of the block of pixels, using at least three pixel luminance values from pixels in a second row of pixels of the block of pixels, and wherein the missing pixel in the interline gap falls between the first row of pixels and the second row of pixels.

9. The method of claim 1, wherein the plurality of the missing pixel gradient values includes at least three missing pixel gradient values but less than fifteen missing pixel gradient values.

10. The method of claim 1, wherein the missing pixel is generated using high angle spatial interpolation even if the missing pixel exhibits either the left tilt gradient condition or the right tilt gradient condition, but only when there are less than two lines of pixels either above or below the interline gap.

11. The method of claim 1, wherein each pixel of the block of pixels includes a luminance value and a chrominance value, and wherein the determining that the block of pixels exhibits a motion characteristic involves using the luminance values of substantially all the pixels of the block of pixels in a motion detection calculation.

12. A circuit for deinterlacing a field of pixels that includes a block of pixels including a missing pixel, the circuit comprising:

a memory that stores the field of pixels;

a memory controller that reads the block of pixels out of the memory, wherein the block of pixels contains fewer pixels than does the field of pixels; and

block-based motion detection and deinterlacing (BBMDD) circuitry that receives the block of pixels from the memory controller, wherein the BBMDD circuitry determines that the block of pixels exhibits a motion characteristic, wherein the BBMDD circuitry generates a plurality of missing pixel gradient values using pixels surrounding the missing pixel, wherein the plurality of missing pixel gradient values exhibits a pattern, wherein the BBMDD circuitry determines whether the missing pixel exhibits a left tilt gradient condition or a right tilt gradient condition based on the pattern of the plurality of missing pixel gradient values, and wherein the BBMDD circuitry generates the missing pixel using high angle spatial interpolation if the missing pixel exhibits neither the left tilt gradient condition nor the right tilt gradient condition.

13. The circuit of claim 12, wherein the BBMDD circuitry generates the missing pixel using low angle spatial interpolation if the missing pixel exhibits either the left tilt gradient condition or the right tilt gradient condition.

14. The circuit of claim 12, further comprising:

a buffer, wherein the BBMDD circuitry receives the block of pixels from the memory controller via the buffer; and

a first-in-first-out (FIFO), wherein the BBMDD circuitry transfers the generated missing pixel to the memory controller via the FIFO.

15. The circuit of claim 12, wherein the BBMDD circuitry comprises a motion history buffer, and wherein the BBMDD circuitry writes a motion history bit into the motion history buffer to indicate that the block of pixels exhibits the motion characteristic.

16. The circuit of claim 13, wherein the low angle spatial interpolation is more computationally intensive than the high angle spatial interpolation.

17. The circuit of claim 12, wherein the circuit is coupled to programmable logic, wherein the circuit and the programmable logic are integrated onto an integrated circuit, and wherein the programmable logic is programmed to implement a video enhancement algorithm.

18. The circuit of claim 17, wherein the integrated circuit is part of an HDTV television.

19. A circuit for deinterlacing a field of pixels that includes a block of pixels, the block of pixels including a missing pixel, the circuit comprising:

a memory that stores the field of pixels;

a memory controller that reads the block of pixels out of the memory, wherein the block of pixels contains fewer pixels than does the field of pixels; and

means for receiving the block of pixels from the memory controller and for determining that the block of pixels exhibits a motion characteristic, wherein the means generates a plurality of missing pixel gradient values using pixels surrounding the missing pixel, wherein the plurality of missing pixel gradient values exhibits a pattern, wherein the means determines whether the missing pixel exhibits a left tilt gradient condition or a right tilt gradient condition based on the pattern of the plurality of missing pixel gradient values, and wherein the means generates the missing pixel using high angle spatial interpolation if the missing pixel exhibits neither the left tilt gradient condition nor the right tilt gradient condition.

20. The circuit of claim 19, wherein the means generates the missing pixel using low angle spatial interpolation if the missing pixel exhibits either the left tilt gradient condition or the right tilt gradient condition.