Communication network apparatus and method

• US 7,830,885 B2
• Filed: 10/05/2007
• Issued: 11/09/2010
• Est. Priority Date: 12/21/1998
• Status: Expired due to Fees

• Current Assignee: AT&T Intellectual Property II LP (AT&T, Inc.)
• Original Assignee: AT&T Intellectual Property II LP (AT&T, Inc.)
• Inventors: Lu, Xiaolin
• Primary Examiner(s): Cho; Hong
• Assistant Examiner(s): Cattungal; Ajay P
• Application Number:
  US11/867,911
• Publication Number:
  US 20080025313A1
• Time in Patent Office: 1,131 Days
• Field of Search: None
• US Class Current: 370/392
• CPC Class Codes: H04L 12/66 Arrangements for connecting between networks having differing types of switching systems, e.g. gateways
• CPC Class Codes: H04L 45/00 Routing or path finding of packets in data switching networks routing or path finding in wireless networks H04W40/00
• CPC Class Codes: H04L 45/04 Interdomain routing, e.g. hierarchical routing
• CPC Class Codes: H04L 45/62 Wavelength based optical switching H04Q11/0062

Abstract

A communication network apparatus and method for routing communication signals from a source device to a receiving device. The apparatus performs only local processing on communication signals to thereby increase the speed of processing the signals. A plurality of the processing nodes are combined into a plurality of sub-networks that comprise the network apparatus. Each processing node of a sub-network need only process address information pertaining, to the node'"'"'s current layer, one layer above it, if any, and one layer below it, if any.

Claims

1. A method of routing signals through a network, comprising:

receiving a signal at a first processing node;

passing the signal to a second processing node if a frequency or a wavelength of the signal is not assigned to the first processing node; and

processing address information if the frequency or wavelength of the signal is assigned to the first processing node, wherein the network is comprised of a plurality of layers, and wherein said processing address information comprises;

reading a first address from a first address field of the address information, the first address field corresponding to a next higher layer in the network;

determining if the first address identifies a parent processing node; and

if the first address does not identify the parent processing node routing the signal to the parent processing node.

2. The method of claim 1, wherein said passing the signal to the second processing node further comprises passing the signal through a filter which directs signals of a first frequency or wavelength to a first output port, signals of a second frequency or wavelength to a second output port and signals of a third frequency or wavelength to a third output port.

3. The method of claim 2, wherein the first output port corresponds to a processing module of the first processing node, the second output port corresponds to an interface with processing nodes of a same sub-network, and the third output port corresponds to an interface with processing nodes of an above sub-network.

4. The method of claim 1, further comprising:

reading a second address from a second address field if the first address does identify the parent processing node;

determining if the second address identifies a current processing node; and

if the second address does not identify the current processing node, routing the signal to another processing node in the same sub-network.

5. The method of claim 4, further comprising:

reading a third address from a third address field if the second address does identify the current processing node; and

routing the signal to a processing node in a lower layer or a child device identified by the third address.

6. The method of claim 1, further comprising outputting a carrier signal to the second processing node in an above sub-network if the address information does not include an address for the second processing node.

7. The method of claim 1, further comprising outputting a carrier signal to the second processing node in a below sub-network or to a child device if the address information includes an address for a parent processing node and an address for the first processing node.

8. The method of claim 1, further comprising outputting a carrier signal to the second processing node in a same sub-network if the address information includes an address for a parent processing node and does not include an address for the first processing node.

9. The method of claim 1, further comprising passing the signal to the second processing node if the frequency or wavelength of the signal is an express frequency or wavelength.

10. The method of claim 9, wherein if the frequency or wavelength of the signal is an express frequency of wavelength, the signal is passed to the second processing node without processing address information.

11. A non-transitory computer readable medium having stored thereon a plurality of instructions, the plurality of instructions including instructions which, when executed by a processor, cause the processor to perform steps of a method of routing signals through a network, comprising:

receiving a signal at a first processing node;

passing the signal to a second processing node if a frequency or a wavelength of the signal is not assigned to the first processing node; and

processing address information if the frequency or wavelength of the signal is assigned to the first processing node, wherein the network is comprised of a plurality of layers, and wherein said processing address information comprises;

reading a first address from a first address field of the address information, the first address field corresponding to a next higher layer in the network;

determining if the first address identifies a parent processing node; and

if the first address does not identify the parent processing node routing the signal to the parent processing node.

12. The non-transitory computer readable medium of claim 11, wherein said passing the signal to the second processing node further comprises passing the signal through a filter which directs signals of a first frequency or wavelength to a first output port, signals of a second frequency or wavelength to a second output port and signals of a third frequency or wavelength to a third output port.

13. The non-transitory computer readable medium of claim 12, wherein the first output port corresponds to a processing module of the first processing node, the second output port corresponds to an interface with processing nodes of a same sub-network, and the third output port corresponds to an interface with processing nodes of an above sub-network.

14. The non-transitory computer readable medium of claim 11, further comprising:

reading a second address from a second address field if the first address does identify the parent processing node;

determining if the second address identifies a current processing node; and

if the second address does not identify the current processing node, routing the signal to another processing node in the same sub-network.

15. The non-transitory computer readable medium of claim 14, further comprising:

reading a third address from a third address field if the second address does identify the current processing node; and

routing the signal to a processing node in a lower layer or a child device identified by the third address.

16. The non-transitory computer readable medium of claim 11, further comprising outputting a carrier signal to the second processing node in an above sub-network if the address information does not include an address for the second processing node.

17. The non-transitory computer readable medium of claim 11, further comprising outputting a carrier signal to the second processing node in a below sub-network or to a child device if the address information includes an address for a parent processing node and an address for the first processing node.

18. The non-transitory computer readable medium of claim 11, further comprising outputting a carrier signal to the second processing node in a same sub-network if the address information includes an address for a parent processing node and does not include an address for the first processing node.